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authorOwen Anderson <resistor@mac.com>2008-09-03 17:37:03 +0000
committerOwen Anderson <resistor@mac.com>2008-09-03 17:37:03 +0000
commitea666816c217437057cf93294feda4590db9cfc1 (patch)
treeea8754eb810835ac83a5b26a0f0191a74a786f49 /llvm/lib/CodeGen
parent167adebb3f211a1997293f4dc693f157e2cb5ab0 (diff)
downloadbcm5719-llvm-ea666816c217437057cf93294feda4590db9cfc1.tar.gz
bcm5719-llvm-ea666816c217437057cf93294feda4590db9cfc1.zip
Fix an issue where we were reusing materializations of constants in blocks not dominated by the materialization. This is
the simple fix, materializing the constant before every use. It might be better to either track domination of uses or to materialize all constants and the beginning of the function and let remat sort when to do materialization at uses. llvm-svn: 55703
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/FastISel.cpp24
1 files changed, 15 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
index e44a6c29f55..6b47e1808f0 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -21,21 +21,26 @@
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
+// Don't cache constant materializations. To do so would require
+// tracking what uses they dominate. Non-constants, however, already
+// have the SSA def-doms-use requirement enforced, so we can cache their
+// computations.
unsigned FastISel::getRegForValue(Value *V,
DenseMap<const Value*, unsigned> &ValueMap) {
- unsigned &Reg = ValueMap[V];
- if (Reg != 0)
- return Reg;
+ if (ValueMap.count(V))
+ return ValueMap[V];
MVT::SimpleValueType VT = TLI.getValueType(V->getType()).getSimpleVT();
if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
if (CI->getValue().getActiveBits() > 64)
return 0;
- Reg = FastEmit_i(VT, VT, ISD::Constant, CI->getZExtValue());
+ // Don't cache constant materializations. To do so would require
+ // tracking what uses they dominate.
+ return FastEmit_i(VT, VT, ISD::Constant, CI->getZExtValue());
} else if (isa<ConstantPointerNull>(V)) {
- Reg = FastEmit_i(VT, VT, ISD::Constant, 0);
+ return FastEmit_i(VT, VT, ISD::Constant, 0);
} else if (ConstantFP *CF = dyn_cast<ConstantFP>(V)) {
- Reg = FastEmit_f(VT, VT, ISD::ConstantFP, CF);
+ unsigned Reg = FastEmit_f(VT, VT, ISD::ConstantFP, CF);
if (!Reg) {
const APFloat &Flt = CF->getValueAPF();
@@ -56,12 +61,13 @@ unsigned FastISel::getRegForValue(Value *V,
if (Reg == 0)
return 0;
}
+
+ return Reg;
} else if (isa<UndefValue>(V)) {
- Reg = createResultReg(TLI.getRegClassFor(VT));
+ unsigned Reg = createResultReg(TLI.getRegClassFor(VT));
BuildMI(MBB, TII.get(TargetInstrInfo::IMPLICIT_DEF), Reg);
+ return Reg;
}
-
- return Reg;
}
/// UpdateValueMap - Update the value map to include the new mapping for this
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