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* Fix add/sub expansion: don't create ADD / SUB with two results (seems like ↵Evan Cheng2008-12-121-5/+5
| | | | | | everyone is doing this these days :-). Patch by Daniel M Gessel! llvm-svn: 60958
* When using a 4 byte jump table on a 64 bit machine,Duncan Sands2008-12-121-11/+3
| | | | | | | | do an extending load of the 4 bytes rather than a potentially illegal (type) i32 load followed by a sign extend. llvm-svn: 60945
* Added support for SELECT v8i8 v4i16 for X86 (MMX)Mon P Wang2008-12-121-0/+4
| | | | | | Added support for TRUNC v8i16 to v8i8 for X86 (MMX) llvm-svn: 60916
* Redo the arithmetic with overflow architecture. I was changing the semantics ofBill Wendling2008-12-121-15/+0
| | | | | | | | | | | | ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace the intrinsic with an ISD::SADDO node. Then custom lower that into an X86ISD::ADD node with a associated SETCC that checks the correct condition code (overflow or carry). Then that gets lowered into the correct X86::ADDOvf instruction. Similar for SUB and MUL instructions. llvm-svn: 60915
* Avoid generating a convert_rndsat node when the src and dest type are the same.Mon P Wang2008-12-111-0/+4
| | | | llvm-svn: 60869
* Clarify FIXME.Bill Wendling2008-12-111-6/+6
| | | | llvm-svn: 60867
* Whitespace clean up (tabs with spaces)Mon P Wang2008-12-111-8/+8
| | | | llvm-svn: 60866
* Make fix for r60829 less conservative to allow the proper optimization forMon P Wang2008-12-111-2/+9
| | | | | | vec_extract-sse4.ll. llvm-svn: 60865
* Add a newline after this debug output.Bill Wendling2008-12-101-1/+1
| | | | llvm-svn: 60861
* If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation onBill Wendling2008-12-101-0/+15
| | | | | | | them. The DAG combiner expects that nodes that are transformed have one value result. llvm-svn: 60857
* For amusement, implement SADDO, SSUBO, UADDO, USUBODuncan Sands2008-12-102-19/+80
| | | | | | | | | for promoted integer types, eg: i16 on ppc-32, or i24 on any platform. Complete support for arbitrary precision integers would require handling expanded integer types, eg: i128, but I couldn't be bothered. llvm-svn: 60834
* Fixed a bug when trying to optimize a extract vector element of aMon P Wang2008-12-101-1/+2
| | | | | | bit convert that changes the number of elements of a shuffle. llvm-svn: 60829
* Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids ↵Evan Cheng2008-12-102-11/+11
| | | | | | some overflow issues. Patch by Thomas Jablin. llvm-svn: 60828
* Whitespace changes.Bill Wendling2008-12-101-1/+1
| | | | llvm-svn: 60826
* Whitespace fixes.Bill Wendling2008-12-101-14/+12
| | | | llvm-svn: 60818
* Update CalcLatency to work in terms of edge latencies, rather thanDan Gohman2008-12-101-26/+5
| | | | | | | | node latencies. Use CalcLatency instead of manual code in CalculatePriorities to keep it consistent. Previously it computed slightly different results. llvm-svn: 60817
* Fix a couple of Dwarf bugs.Evan Cheng2008-12-102-8/+22
| | | | | | | - Emit DW_AT_byte_size for struct and union of size zero. - Emit DW_AT_declaration for forward type declaration. llvm-svn: 60812
* Rewrite the SDep class, and simplify some of the related code.Dan Gohman2008-12-099-303/+318
| | | | | | | | | | | | | | | | | The Cost field is removed. It was only being used in a very limited way, to indicate when the scheduler should attempt to protect a live register, and it isn't really needed to do that. If we ever want the scheduler to start inserting copies in non-prohibitive situations, we'll have to rethink some things anyway. A Latency field is added. Instead of giving each node a single fixed latency, each edge can have its own latency. This will eventually be used to model various micro-architecture properties more accurately. The PointerIntPair class and an internal union are now used, which reduce the overall size. llvm-svn: 60806
* Minor code simplification.Dan Gohman2008-12-091-3/+3
| | | | llvm-svn: 60804
* Add sub/mul overflow intrinsics. This currently doesn't have aBill Wendling2008-12-096-25/+87
| | | | | | | target-independent way of determining overflow on multiplication. It's very tricky. Patch by Zoltan Varga! llvm-svn: 60800
* Fix PR3117: not all nodes being legalized. TheDuncan Sands2008-12-097-207/+467
| | | | | | | | | | | | | | | | | | | | | | | essential problem was that the DAG can contain random unused nodes which were never analyzed. When remapping a value of a node being processed, such a node may become used and need to be analyzed; however due to operands being transformed during analysis the node may morph into a different one. Users of the morphing node need to be updated, and this wasn't happening. While there I added a bunch of documentation and sanity checks, so I (or some other poor soul) won't have to scratch their head over this stuff so long trying to remember how it was all supposed to work next time some obscure problem pops up! The extra sanity checking exposed a few places where invariants weren't being preserved, so those are fixed too. Since some of the sanity checking is expensive, I added a flag to turn it on. It is also turned on when building with ENABLE_EXPENSIVE_CHECKS=1. llvm-svn: 60797
* Cosmetic changes.Evan Cheng2008-12-091-6/+8
| | | | llvm-svn: 60771
* Whitespace cleanups.Dan Gohman2008-12-091-12/+14
| | | | llvm-svn: 60769
* In LegalizeOp, don't change the result type of CONVERT_RNDSAT when promotingMon P Wang2008-12-091-2/+2
| | | | | | one of its operand. llvm-svn: 60749
* Fix getNode to allow a vector for the shift amount for shifts of vectors.Mon P Wang2008-12-092-9/+33
| | | | | | | | Fix the shift amount when unrolling a vector shift into scalar shifts. Fix problem in getShuffleScalarElt where it assumes that the input of a bit convert must be a vector. llvm-svn: 60740
* Don't charge full latency for an anti-dependence, in this simplisticDan Gohman2008-12-091-3/+7
| | | | | | pipeline model. llvm-svn: 60733
* Fix the top-level comments, and fix some 80-column violations.Dan Gohman2008-12-081-7/+9
| | | | llvm-svn: 60707
* Factor out the code for sign-extending/truncating gep indicesDan Gohman2008-12-081-23/+32
| | | | | | | | | and use it in x86 address mode folding. Also, make getRegForValue return 0 for illegal types even if it has a ValueMap for them, because Argument values are put in the ValueMap. This fixes PR3181. llvm-svn: 60696
* Move createVirtualRegister out-of-line.Dan Gohman2008-12-081-0/+18
| | | | llvm-svn: 60684
* Clarify some comments.Dan Gohman2008-12-081-2/+2
| | | | llvm-svn: 60683
* Switch to top-down mode and fix a crasher this exposed caused by an error in theOwen Anderson2008-12-071-1/+11
| | | | | | live interval updating. llvm-svn: 60652
* Reason #3 from 60595 doesn't hold true. If we can fold a PIC load from ↵Evan Cheng2008-12-051-9/+11
| | | | | | constpool into a use, the rewrite happens at time of spill (not in VirtRegMap). Later on, if the GlobalBaseReg is spilled, the spiller can see the use uses GlobalBaseReg and do the right thing. llvm-svn: 60596
* Fix comment.Evan Cheng2008-12-051-1/+1
| | | | llvm-svn: 60592
* Drop the reg argument to isRegReDefinedByTwoAddr, which was redundant.Dan Gohman2008-12-054-6/+7
| | | | llvm-svn: 60586
* Teach StackSlotColoring to update MachineMemOperands whenDan Gohman2008-12-051-3/+20
| | | | | | | changing the stack slots on an instruction, to keep them consistent with the actual memory addresses. llvm-svn: 60584
* Ignore IMPLICIT_DEF instructions when computing physreg liveness.Dan Gohman2008-12-051-0/+7
| | | | | | | | | | While they appear to provide a normal clobbering def, they don't in the case of the awkward IMPLICIT_DEF+INSERT_SUBREG idiom. It would be good to change INSERT_SUBREG; until then, this change allows post-regalloc scheduling to cope in a mildly conservative way. llvm-svn: 60583
* Factor out some common code.Owen Anderson2008-12-041-76/+39
| | | | llvm-svn: 60553
* When allocating a stack temporary, use the correctDuncan Sands2008-12-041-1/+1
| | | | | | | number of bytes for types such as i1 which are not a multiple of 8 bits in length. llvm-svn: 60543
* Use register names instead of numbers in debug output.Dan Gohman2008-12-041-2/+3
| | | | llvm-svn: 60525
* Make debug output more informative.Dan Gohman2008-12-041-1/+1
| | | | llvm-svn: 60524
* Add minimal support for disambiguating memory references. CurrentlyDan Gohman2008-12-041-13/+123
| | | | | | the main thing this covers is spills to distinct spill slots. llvm-svn: 60517
* Rewrite the liveness bookkeeping code to fix a bunch ofDan Gohman2008-12-031-34/+42
| | | | | | issues with subreg operands and tied operands. llvm-svn: 60510
* Have PseudoSourceValue override Value::dump, so that it worksDan Gohman2008-12-031-0/+4
| | | | | | | on PseudoSourceValue values. This also fixes a FIXME in lib/VMCode/AsmWriter.cpp. llvm-svn: 60507
* Fix an inconsistency in a comment.Dan Gohman2008-12-031-4/+3
| | | | llvm-svn: 60500
* Don't charge the full latency for anti and output dependencies. This isDan Gohman2008-12-031-3/+6
| | | | | | | an area where eventually it would be good to use target-dependent information. llvm-svn: 60498
* When looking for anti-dependences on the critical path, don't botherDan Gohman2008-12-031-0/+4
| | | | | | examining non-anti-dependence edges. llvm-svn: 60496
* Add a comment about callee-saved registers.Dan Gohman2008-12-031-0/+2
| | | | llvm-svn: 60495
* Split foldMemoryOperand into public non-virtual and protected virtualDan Gohman2008-12-031-0/+68
| | | | | | | parts, and add target-independent code to add/preserve MachineMemOperands. llvm-svn: 60488
* Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.Dan Gohman2008-12-031-3/+3
| | | | llvm-svn: 60487
* Only check that the result of the mapping was notDuncan Sands2008-12-031-0/+1
| | | | | | a new node if the node was actually remapped. llvm-svn: 60482
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