If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation on

them. The DAG combiner expects that nodes that are transformed have one value
result.

llvm-svn: 60857

1 files changed, 15 insertions, 0 deletions

diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 9cc8061f183..7e78923f6d9 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -966,6 +966,11 @@ SDValue DAGCombiner::visitADD(SDNode *N) {
     SDValue FoldedVOp = SimplifyVBinOp(N);
     if (FoldedVOp.getNode()) return FoldedVOp;
   }
+
+  if (N->getNumValues() != 1)
+    // FIXME: DAG combiner cannot handle multiple return values on arithmetic
+    //        operators.
+    return SDValue();
   
   // fold (add x, undef) -> undef
   if (N0.getOpcode() == ISD::UNDEF)
@@ -1161,6 +1166,11 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
     SDValue FoldedVOp = SimplifyVBinOp(N);
     if (FoldedVOp.getNode()) return FoldedVOp;
   }
+
+  if (N->getNumValues() != 1)
+    // FIXME: DAG combiner cannot handle multiple return values on arithmetic
+    //        operators.
+    return SDValue();
   
   // fold (sub x, x) -> 0
   if (N0 == N1)
@@ -1220,6 +1230,11 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
     if (FoldedVOp.getNode()) return FoldedVOp;
   }
   
+  if (N->getNumValues() != 1)
+    // FIXME: DAG combiner cannot handle multiple return values on arithmetic
+    //        operators.
+    return SDValue();
+    
   // fold (mul x, undef) -> 0
   if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)
     return DAG.getConstant(0, VT);