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* [DAGCombiner] simplify code; NFCSanjay Patel2019-01-101-11/+11
* [SelectionDAGBuilder] Refactor GetRegistersForValue. NFCI.Nirav Dave2019-01-101-60/+42
* [SelectionDAGBuilder] Fix formatting. NFC.Nirav Dave2019-01-101-1/+2
* [SelectionDAGBuilder] Refactor visitInlineAsm. NFC.Nirav Dave2019-01-101-45/+24
* [opaque pointer types] Remove some calls to generic Type subtype accessors.James Y Knight2019-01-101-7/+7
* [CodeGen] Ignore return sext/zext attributes of unused results for tail callsFrancis Visoiu Mistrih2019-01-091-0/+15
* [DebugInfo] Omit location list entries with empty rangesDavid Stenberg2019-01-091-0/+13
* GlobalISel: Implement fewerElements for implicit_defMatt Arsenault2019-01-091-0/+26
* GlobalISel: Implement widenScalar for implicit_defMatt Arsenault2019-01-091-0/+6
* [NFC] fix trivial typos in commentsHiroshi Inoue2019-01-097-10/+10
* Remove check for single use in ShrinkDemandedConstantStanislav Mekhanoshin2019-01-091-3/+0
* RegisterCoalescer: Assume CR_Replace for SubRangeJoinMatt Arsenault2019-01-081-0/+6
* RegisterCoalescer: Defer clearing implicit_def lanesMatt Arsenault2019-01-081-16/+33
* Revert "Revert "Revert "Resubmit rL345008 "Split MachinePipeliner code into h...Adrian Prantl2019-01-081-5/+595
* Rename DIFlagFixedEnum to DIFlagEnumClass. NFCPaul Robinson2019-01-081-1/+1
* [MachineVerifier] Include offending register in allocatable live-in error msg.Florian Hahn2019-01-081-0/+6
* [GlobalISel] Fix choice of instruction selector for AArch64 at -O0 with -glob...Petr Pavlu2019-01-081-12/+23
* Revert "Revert "Resubmit rL345008 "Split MachinePipeliner code into header an...Lama Saba2019-01-081-595/+5
* [GlobalISel] Fix unused variable warning in Release builds.Benjamin Kramer2019-01-081-3/+3
* Fix typosMatt Arsenault2019-01-081-2/+2
* RegBankSelect: Fix copy insertion point for terminatorsMatt Arsenault2019-01-081-9/+15
* [RegisterCoalescer] dst register's live interval needs to be updated whenWei Mi2019-01-081-0/+7
* [TargetLowering][AMDGPU] Remove the SimplifyDemandedBits function that takes ...Craig Topper2019-01-071-50/+0
* Revert "Resubmit rL345008 "Split MachinePipeliner code into header and cpp fi...Lama Saba2019-01-061-5/+595
* Resubmit rL345008 "Split MachinePipeliner code into header and cpp files"Lama Saba2019-01-061-595/+5
* [LegalizeVectorOps] Add FSHL/FSHR to the list of vector operations that shoul...Craig Topper2019-01-061-0/+2
* Added single use check to ShrinkDemandedConstantStanislav Mekhanoshin2019-01-051-0/+3
* [X86] Add INSERT_SUBVECTOR to ComputeNumSignBitsCraig Topper2019-01-041-1/+35
* [DAGCombiner][x86] scalarize binop followed by extractelementSanjay Patel2019-01-031-5/+44
* Revert "Resubmit rL345008 "Split MachinePipeliner code into header and cpp fi...Stefan Granitz2019-01-031-5/+595
* Resubmit rL345008 "Split MachinePipeliner code into header and cpp files"Lama Saba2019-01-031-595/+5
* [CodeGen] Skip over dbg-instr in twoaddr passMarkus Lavin2019-01-031-3/+6
* [DAGCombiner] After performing the division by constant optimization for a DI...Craig Topper2019-01-021-2/+29
* [LegalizeIntegerTypes] When promoting the result of an extract_vector_elt als...Craig Topper2019-01-021-2/+20
* [DAGCombiner][X86][PowerPC] Teach visitSIGN_EXTEND_INREG to fold (sext_in_reg...Craig Topper2019-01-021-2/+5
* Reversing the commit in revision 350186. Revision causes regression in 4Ayonam Ray2019-01-012-33/+53
* Omit range checks from jump tables when lowering switches with unreachableAyonam Ray2019-01-012-53/+33
* [SelectionDAG] Add SIGN_EXTEND_VECTOR_INREG support to computeKnownBits.Craig Topper2018-12-311-1/+9
* [DAGCombiner] Add missing one use check on the shuffle in the bitcast(shuffle...Craig Topper2018-12-311-1/+1
* [PowerPC] Fix ADDE, SUBE do not know how to promote operatorKang Zhang2018-12-301-0/+5
* Add vtable anchor to classes.Richard Trieu2018-12-292-0/+6
* [codeview] Check if this 'this' type of a method is a pointerReid Kleckner2018-12-262-8/+19
* [NVPTX] Allow libcalls that are defined in the current module.Justin Lebar2018-12-261-0/+26
* [MIPS GlobalISel] Select G_SELECTPetar Avramovic2018-12-251-8/+11
* [X86] Use GetDemandedBits to simplify the operands of PMULDQ/PMULUDQ.Craig Topper2018-12-241-0/+9
* Revert rL350048 and rL350050Max Kazantsev2018-12-242-16/+9
* Fix build - follow-up to r350048 which broke headerless (v4) address poolDavid Blaikie2018-12-242-8/+10
* DebugInfo: Use assembly label arithmetic for address pool size for easier rea...David Blaikie2018-12-242-5/+10
* DebugInfo: Add assembly comments for debug_addr contribution header fieldsDavid Blaikie2018-12-241-0/+4
* [SelectionDAGBuilder] Use ::precise LocationSizes; NFCGeorge Burgess IV2018-12-241-11/+23
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