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* Turn a 2-address instruction into a 3-address one when it's profitable even ↵Evan Cheng2009-03-301-21/+68
| | | | | | | | | | | | | if the two-address operand is killed. e.g. %reg1024<def> = MOV r1 %reg1025<def> = ADD %reg1024, %reg1026 r0 = MOV %reg1025 If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy. llvm-svn: 68065
* Balance out quote in debug output.Bill Wendling2009-03-301-1/+1
| | | | llvm-svn: 68059
* Fix grammar-o in comment.Bill Wendling2009-03-301-1/+1
| | | | llvm-svn: 68057
* Constify arguments in isSuccessor and isLayoutSuccessor.Dan Gohman2009-03-301-2/+2
| | | | llvm-svn: 68054
* Fix PR3899: add support for extracting floats from vectorsDuncan Sands2009-03-293-0/+22
| | | | | | | when using -soft-float. Based on a patch by Jakob Stoklund Olesen. llvm-svn: 67996
* Make check in CheckTailCallReturnConstraints for ignorable instructions betweenArnold Schwaighofer2009-03-281-18/+32
| | | | | | | a CALL and a RET node more generic. Add a test for tail calls with a void return. llvm-svn: 67943
* Enable tail call optimization for functions that return a struct (bug 3664) ↵Arnold Schwaighofer2009-03-281-0/+24
| | | | | | and for functions that return types that need extending (e.g i1). llvm-svn: 67934
* Optimize some 64-bit multiplication by constants into two lea's or one lea + ↵Evan Cheng2009-03-281-8/+8
| | | | | | | | | | | | | | | | | shl since imulq is slow (latency 5). e.g. x * 40 => shlq $3, %rdi leaq (%rdi,%rdi,4), %rax This has the added benefit of allowing more multiply to be folded into addressing mode. e.g. a * 24 + b => leaq (%rdi,%rdi,2), %rax leaq (%rsi,%rax,8), %rax llvm-svn: 67917
* Fix what surely must be a copy+pasto.Dan Gohman2009-03-271-2/+2
| | | | llvm-svn: 67881
* Initialize LiveOutInfo's APInt members to zero, as APInt'sDan Gohman2009-03-271-1/+1
| | | | | | | default constructor produces an uninitialized APInt. This fixes PR3896. llvm-svn: 67879
* Shrink wrapping in PEI: initial release. Finishing development, enable with ↵John Mosby2009-03-271-43/+913
| | | | | | --shrink-wrap. llvm-svn: 67828
* Don't assign a new stack slot if the pre-alloc splitter already assigned one.Owen Anderson2009-03-261-2/+9
| | | | llvm-svn: 67764
* Pull transform from target-dependent code into target-independent code.Bill Wendling2009-03-261-0/+49
| | | | llvm-svn: 67742
* Revert 67132. This is breaking some objective-c apps.Evan Cheng2009-03-251-3/+13
| | | | | | Also fixes SDISel so it *does not* force promote return value if the function is not marked signext / zeroext. llvm-svn: 67701
* When optimizing with debug info, don't keep theDale Johannesen2009-03-251-4/+5
| | | | | | | | stoppoint nodes around until Legalize; doing this imposed an ordering on a sequence of loads that came from different lines, interfering with scheduling. llvm-svn: 67692
* CodeGen still defaults to non-verbose asm, but llc now overrides it and ↵Evan Cheng2009-03-253-7/+18
| | | | | | default to verbose. llvm-svn: 67668
* Do not ignore DW_TAG_class_type!Devang Patel2009-03-251-0/+1
| | | | llvm-svn: 67661
* Fix PR3845: Avoid stale MachineInstruction pointer reference.Evan Cheng2009-03-241-3/+1
| | | | llvm-svn: 67649
* more tidying: name the components of PhysReg in the case whenChris Lattner2009-03-241-8/+9
| | | | | | the target constraint specifies a specific physreg. llvm-svn: 67618
* Tidy a bit more.Chris Lattner2009-03-241-3/+3
| | | | llvm-svn: 67617
* simplify this code a bit now that "allocation to a vreg class" can neverChris Lattner2009-03-241-16/+13
| | | | | | fail. llvm-svn: 67616
* Minor compile-time optimization; don't bother checkingDan Gohman2009-03-241-1/+1
| | | | | | | canClobberPhysRegDefs if the successor node doesn't clobber any physical registers. llvm-svn: 67587
* Add a pre-pass to the burr-list scheduler which makes adjustments toDan Gohman2009-03-241-0/+120
| | | | | | | | | help out the register pressure reduction heuristics in the case of nodes with multiple uses. Currently this uses very conservative heuristics, so it doesn't have a broad impact, but in cases where it does help it can make a big difference. llvm-svn: 67586
* Do not emit comments unless -asm-verbose.Evan Cheng2009-03-241-93/+150
| | | | llvm-svn: 67580
* Fix a bug in spill weight computation. If the alias is a super-register, and ↵Evan Cheng2009-03-231-7/+34
| | | | | | | | | | | the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases. e.g. allocating for GR32, bh is not used, updating bl spill weight. bl should get the same spill weight otherwise it will be choosen as a spill candidate since spilling bh doesn't make ebx available. This fix PR2866. llvm-svn: 67574
* Fix internal representation of fp80 to be theDale Johannesen2009-03-231-8/+8
| | | | | | | | | | same as a normal i80 {low64, high16} rather than its own {high64, low16}. A depressing number of places know about this; I think I got them all. Bitcode readers and writers convert back to the old form to avoid breaking compatibility. llvm-svn: 67562
* When unfolding a load during scheduling, the new operator node hasDan Gohman2009-03-231-3/+6
| | | | | | | | | | a data dependency on the load node, so it really needs a data-dependence edge to the load node, even if the load previously existed. And add a few comments. llvm-svn: 67554
* Fix PR3391 and PR3864. Reg allocator infinite looping.Evan Cheng2009-03-232-6/+14
| | | | llvm-svn: 67544
* Don't set SUnit::hasPhysRegDefs to true unless the defs areDan Gohman2009-03-231-1/+4
| | | | | | actually have uses, which reflects the way it's used. llvm-svn: 67540
* Fix canClobberPhysRegDefs to check all SDNodes grouped togetherDan Gohman2009-03-231-14/+19
| | | | | | | in an SUnit, instead of just the first one. This fix is needed by some upcoming scheduler changes. llvm-svn: 67531
* Add a new bit to SUnit to record whether a node has implicit physregDan Gohman2009-03-231-3/+6
| | | | | | defs, regardless of whether they are actually used. llvm-svn: 67528
* Now that errs() is properly non-buffered, there's no need toDan Gohman2009-03-233-4/+2
| | | | | | explicitly flush it. llvm-svn: 67526
* Model inline asm constraint which ties an input to an output register as ↵Evan Cheng2009-03-234-38/+92
| | | | | | machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. llvm-svn: 67512
* Do not fold away subreg_to_reg if the source register has a sub-register ↵Evan Cheng2009-03-231-3/+9
| | | | | | | | | | index. That means the source register is taking a sub-register of a larger register. e.g. On x86 %RAX<def> = ... %RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3 The first def is defining RAX, not EAX so the top bits were not zero-extended. llvm-svn: 67511
* Simplify this code; use a while instead of an if and a do-while.Dan Gohman2009-03-201-9/+6
| | | | llvm-svn: 67400
* For inline asm output operand that matches an input. Encode the input ↵Evan Cheng2009-03-206-29/+44
| | | | | | operand index in the high bits. llvm-svn: 67387
* Fixed build warnings for unused variables.Sanjiv Gupta2009-03-201-3/+0
| | | | llvm-svn: 67372
* Fixed the comment. No functionality change.Sanjiv Gupta2009-03-201-4/+4
| | | | llvm-svn: 67370
* Apply the patch requested in PR3846.Chris Lattner2009-03-201-1/+1
| | | | llvm-svn: 67364
* Fix the Win32 VS2008 build:Sebastian Redl2009-03-191-1/+1
| | | | | | | | | | - Make type declarations match the struct/class keyword of the definition. - Move AddSignalHandler into the namespace where it belongs. - Correctly call functions from template base. - Some other small changes. With this patch, LLVM and Clang should build properly and with far less noise under VS2008. llvm-svn: 67347
* Added MachineInstr::isRegTiedToDefOperand to check for two-addressness.Evan Cheng2009-03-195-24/+37
| | | | llvm-svn: 67335
* Fix PEI to not walk off the start of a block when an updated instructionChris Lattner2009-03-191-2/+6
| | | | | | is the first in its block. This is PR3842. llvm-svn: 67304
* Added missing support for widening when splitting an unary op (PR3683)Mon P Wang2009-03-184-4/+91
| | | | | | | and expanding a bit convert (PR3711). In both cases, we extract the valid part of the widen vector and then do the conversion. llvm-svn: 67175
* Don't force promotion of return arguments on the callee.Rafael Espindola2009-03-171-9/+0
| | | | | | | Some architectures (like x86) don't require it. This fixes bug 3779. llvm-svn: 67132
* Fix codegen to compute the size of an allocation by multiplying theChris Lattner2009-03-171-8/+17
| | | | | | | | | | | size by the array amount as an i32 value instead of promoting from i32 to i64 then doing the multiply. Not doing this broke wrap-around assumptions that the optimizers (validly) made. The ultimate real fix for this is to introduce i64 version of alloca and remove mallocinst. This fixes PR3829 llvm-svn: 67093
* r66870 missed this out.Sanjiv Gupta2009-03-171-0/+1
| | | | llvm-svn: 67082
* Reapply r67049, with the test adjusted for darwinDuncan Sands2009-03-171-39/+61
| | | | | | (which produces "call L_f$stub" rather than "call f"). llvm-svn: 67079
* Fix a problem with DAGCombine where we were building an illegal buildMon P Wang2009-03-171-6/+11
| | | | | | | | vector shuffle mask. Forced the mask to be built using i32. Note: this will be irrelevant once vector_shuffle no longer takes a build vector for the shuffle mask. llvm-svn: 67076
* Spiller may unfold load / mod / store instructions as an optimization when ↵Evan Cheng2009-03-172-9/+30
| | | | | | the would be loaded value is available in a register. It needs to check if it's legal to clobber the register. Also, the register can contain values of multiple spill slots, make sure to check all instead of just the one being unfolded. llvm-svn: 67068
* --- Reverse-merging (from foreign repository) r67049 into '.':Bill Wendling2009-03-161-61/+39
| | | | | | | | | | | | | | | | U test/CodeGen/X86/2009-03-13-PHIElimBug.ll D test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll U lib/CodeGen/PHIElimination.cpp r67049 was causing this failure: Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/X86/dg.exp ... FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/X86/2009-03-13-PHIElimBug.ll for PR3784 Failed with exit(1) at line 1 while running: llvm-as < /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/X86/2009-03-13-PHIElimBug.ll | llc -march=x86 | /usr/bin/grep -A 2 {call f} | /usr/bin/grep movl child process exited abnormally llvm-svn: 67051
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