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authorChris Lattner <sabre@nondot.org>2009-03-24 15:25:07 +0000
committerChris Lattner <sabre@nondot.org>2009-03-24 15:25:07 +0000
commit42eceb349111e532608c801c3a0d719156df2798 (patch)
tree7b9b23e8facb79a7f871e9062a0a7d473e7aa1aa /llvm/lib/CodeGen
parent246eda43bd2e070811a26451c42f55fc47416413 (diff)
downloadbcm5719-llvm-42eceb349111e532608c801c3a0d719156df2798.tar.gz
bcm5719-llvm-42eceb349111e532608c801c3a0d719156df2798.zip
Tidy a bit more.
llvm-svn: 67617
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 49e67443515..0f5cc17d8d1 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -4929,15 +4929,15 @@ GetRegistersForValue(SDISelAsmOperandInfo &OpInfo,
// Otherwise, if this was a reference to an LLVM register class, create vregs
// for this reference.
- if (PhysReg.second != 0) {
- RegVT = *PhysReg.second->vt_begin();
+ if (const TargetRegisterClass *RC = PhysReg.second) {
+ RegVT = *RC->vt_begin();
if (OpInfo.ConstraintVT == MVT::Other)
ValueVT = RegVT;
// Create the appropriate number of virtual registers.
MachineRegisterInfo &RegInfo = MF.getRegInfo();
for (; NumRegs; --NumRegs)
- Regs.push_back(RegInfo.createVirtualRegister(PhysReg.second));
+ Regs.push_back(RegInfo.createVirtualRegister(RC));
OpInfo.AssignedRegs = RegsForValue(TLI, Regs, RegVT, ValueVT);
return;
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