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| author | Evan Cheng <evan.cheng@apple.com> | 2009-03-23 07:19:58 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-03-23 07:19:58 +0000 |
| commit | 47c9750f04d81bd94bad224899b009764d308f61 (patch) | |
| tree | 4f13d5c5429cff4b759d78da0493cd8fea595a79 /llvm/lib/CodeGen | |
| parent | f2b60658ef6b8bb7cb9caa0dbee3a3b1452050b5 (diff) | |
| download | bcm5719-llvm-47c9750f04d81bd94bad224899b009764d308f61.tar.gz bcm5719-llvm-47c9750f04d81bd94bad224899b009764d308f61.zip | |
Do not fold away subreg_to_reg if the source register has a sub-register index. That means the source register is taking a sub-register of a larger register. e.g. On x86
%RAX<def> = ...
%RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3
The first def is defining RAX, not EAX so the top bits were not zero-extended.
llvm-svn: 67511
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/LowerSubregs.cpp | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/LowerSubregs.cpp b/llvm/lib/CodeGen/LowerSubregs.cpp index 9af276fad62..14acb71eeb4 100644 --- a/llvm/lib/CodeGen/LowerSubregs.cpp +++ b/llvm/lib/CodeGen/LowerSubregs.cpp @@ -165,11 +165,12 @@ bool LowerSubregsInstructionPass::LowerSubregToReg(MachineInstr *MI) { unsigned DstReg = MI->getOperand(0).getReg(); unsigned InsReg = MI->getOperand(2).getReg(); - unsigned SubIdx = MI->getOperand(3).getImm(); + unsigned InsSIdx = MI->getOperand(2).getSubReg(); + unsigned SubIdx = MI->getOperand(3).getImm(); assert(SubIdx != 0 && "Invalid index for insert_subreg"); unsigned DstSubReg = TRI.getSubReg(DstReg, SubIdx); - + assert(TargetRegisterInfo::isPhysicalRegister(DstReg) && "Insert destination must be in a physical register"); assert(TargetRegisterInfo::isPhysicalRegister(InsReg) && @@ -177,8 +178,13 @@ bool LowerSubregsInstructionPass::LowerSubregToReg(MachineInstr *MI) { DOUT << "subreg: CONVERTING: " << *MI; - if (DstSubReg == InsReg) { + if (DstSubReg == InsReg && InsSIdx == 0) { // No need to insert an identify copy instruction. + // Watch out for case like this: + // %RAX<def> = ... + // %RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3 + // The first def is defining RAX, not EAX so the top bits were not + // zero extended. DOUT << "subreg: eliminated!"; } else { // Insert sub-register copy |

