| Commit message (Collapse) | Author | Age | Files | Lines |
| ... | |
| |
|
|
|
|
|
| |
changing the stack slots on an instruction, to keep them
consistent with the actual memory addresses.
llvm-svn: 60584
|
| |
|
|
|
|
|
|
|
|
| |
While they appear to provide a normal clobbering def, they don't
in the case of the awkward IMPLICIT_DEF+INSERT_SUBREG idiom. It
would be good to change INSERT_SUBREG; until then, this change
allows post-regalloc scheduling to cope in a mildly conservative
way.
llvm-svn: 60583
|
| |
|
|
| |
llvm-svn: 60553
|
| |
|
|
|
|
|
| |
number of bytes for types such as i1 which are not
a multiple of 8 bits in length.
llvm-svn: 60543
|
| |
|
|
| |
llvm-svn: 60525
|
| |
|
|
| |
llvm-svn: 60524
|
| |
|
|
|
|
| |
the main thing this covers is spills to distinct spill slots.
llvm-svn: 60517
|
| |
|
|
|
|
| |
issues with subreg operands and tied operands.
llvm-svn: 60510
|
| |
|
|
|
|
|
| |
on PseudoSourceValue values. This also fixes a FIXME in
lib/VMCode/AsmWriter.cpp.
llvm-svn: 60507
|
| |
|
|
| |
llvm-svn: 60500
|
| |
|
|
|
|
|
| |
an area where eventually it would be good to use target-dependent
information.
llvm-svn: 60498
|
| |
|
|
|
|
| |
examining non-anti-dependence edges.
llvm-svn: 60496
|
| |
|
|
| |
llvm-svn: 60495
|
| |
|
|
|
|
|
| |
parts, and add target-independent code to add/preserve
MachineMemOperands.
llvm-svn: 60488
|
| |
|
|
| |
llvm-svn: 60487
|
| |
|
|
|
|
| |
a new node if the node was actually remapped.
llvm-svn: 60482
|
| |
|
|
|
|
| |
Print a single parameter .file directive if we have an ELF target.
llvm-svn: 60480
|
| |
|
|
|
|
|
|
|
| |
is set but mayLoad is not set. Fix all the problems this turned up.
Change code to not use isSimpleLoad instead of mayLoad unless it
really wants isSimpleLoad.
llvm-svn: 60459
|
| |
|
|
|
|
|
|
|
|
|
| |
1. ppcf128 select is expanded to f64 select's.
2. f64 select operand 0 is an i1 truncate, it's promoted to i32 zero_extend.
3. f64 select is updated. It's changed back to a "NewNode" and being re-analyzed.
4. f64 select operands are being processed. Operand 0 is a "NewNode". It's being expunged out of ReplacedValues map.
5. ExpungeNode tries to remap f64 select and notice it's a "NewNode" and assert.
Duncan, please take a look. Thanks.
llvm-svn: 60443
|
| |
|
|
|
|
| |
consistent with the way it's generally done in other places.
llvm-svn: 60439
|
| |
|
|
| |
llvm-svn: 60434
|
| |
|
|
|
|
| |
splitting.
llvm-svn: 60433
|
| |
|
|
| |
llvm-svn: 60432
|
| |
|
|
| |
llvm-svn: 60409
|
| |
|
|
| |
llvm-svn: 60406
|
| |
|
|
| |
llvm-svn: 60392
|
| |
|
|
| |
llvm-svn: 60391
|
| |
|
|
|
|
| |
types.
llvm-svn: 60381
|
| |
|
|
|
|
|
|
| |
MERGE_VALUES node with only one operand, so get
rid of special code that only existed to handle
that possibility.
llvm-svn: 60349
|
| |
|
|
|
|
|
|
|
|
|
| |
ReplaceNodeResults: rather than returning a node which
must have the same number of results as the original
node (which means mucking around with MERGE_VALUES,
and which is also easy to get wrong since SelectionDAG
folding may mean you don't get the node you expect),
return the results in a vector.
llvm-svn: 60348
|
| |
|
|
|
|
| |
as unsigned divisions. Same caveats as before.
llvm-svn: 60284
|
| |
|
|
|
|
|
|
|
|
|
| |
multiplies.
Some more cleverness would be nice, though. It would be nice if we
could do this transformation on illegal types. Also, we would
prefer a narrower constant when possible so that we can use a narrower
multiply, which can be cheaper.
llvm-svn: 60283
|
| |
|
|
|
|
|
|
|
| |
nearby FIXME.
I'm not sure what the right way to fix the Cell test was; if the
approach I used isn't okay, please let me know.
llvm-svn: 60277
|
| |
|
|
|
|
|
| |
Despite changing the order of evaluation, this doesn't actually change the
meaning of the statement.
llvm-svn: 60177
|
| |
|
|
| |
llvm-svn: 60149
|
| |
|
|
| |
llvm-svn: 60141
|
| |
|
|
| |
llvm-svn: 60137
|
| |
|
|
| |
llvm-svn: 60102
|
| |
|
|
|
|
|
| |
and the LiveInterval.h top-level comment and accordingly. This fixes blocks
having spurious live-in registers in boundary cases.
llvm-svn: 60092
|
| |
|
|
|
|
| |
differ. Thanks, Duncan.
llvm-svn: 60043
|
| |
|
|
| |
llvm-svn: 60041
|
| |
|
|
| |
llvm-svn: 60016
|
| |
|
|
| |
llvm-svn: 60015
|
| |
|
|
|
|
|
| |
if the operands have the same sign and the sum has sign opposite to that of the
operands."
llvm-svn: 60014
|
| |
|
|
|
|
|
|
|
| |
introduce any new spilling; it just uses unused registers.
Refactor the SUnit topological sort code out of the RRList scheduler and
make use of it to help with the post-pass scheduler.
llvm-svn: 59999
|
| |
|
|
|
|
|
| |
- Mark "add with overflow" as having a custom lowering for X86. Give it a null
lowering representation for now.
llvm-svn: 59971
|
| |
|
|
|
|
|
| |
to removePred because an SUnit can both data-depend and anti-depend
on the same SUnit.
llvm-svn: 59969
|
| |
|
|
| |
llvm-svn: 59968
|
| |
|
|
|
|
| |
obscure tail-merging opportunities.
llvm-svn: 59967
|
| |
|
|
| |
llvm-svn: 59961
|