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path: root/llvm/lib/CodeGen/VirtRegRewriter.cpp
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* Fix a case where an earlyclobber operand of an asmDale Johannesen2010-06-251-0/+17
| | | | | | | | is reused as an input. PR 4118. Testcase is too big, as usual with bugs in this area, but there's one in the PR. llvm-svn: 106816
* Slightly change the meaning of the reMaterialize target hook when the originalJakob Stoklund Olesen2010-06-021-2/+1
| | | | | | | | | | | | | | | | | | | | | | | instruction defines subregisters. Any existing subreg indices on the original instruction are preserved or composed with the new subreg index. Also substitute multiple operands mentioning the original register by using the new MachineInstr::substituteRegister() function. This is necessary because there will soon be <imp-def> operands added to non read-modify-write partial definitions. This instruction: %reg1234:foo = FLAP %reg1234<imp-def> will reMaterialize(%reg3333, bar) like this: %reg3333:bar-foo = FLAP %reg333:bar<imp-def> Finally, replace the TargetRegisterInfo pointer argument with a reference to indicate that it cannot be NULL. llvm-svn: 105358
* Teach VirtRegRewriter to handle spilling in instructions that have multipleJakob Stoklund Olesen2010-05-211-1/+7
| | | | | | | | | | | | | definitions of the virtual register. This happens when spilling the registers produced by REG_SEQUENCE: %reg1047:5<def>, %reg1047:6<def>, %reg1047:7<def> = VLD3d8 %reg1033, 0, pred:14, pred:%reg0 The rewriter would spill the register multiple times, dead store elimination tried to keep up, but ended up cutting the branch it was sitting on. llvm-svn: 104321
* It's not safe eliminate copies where src and dst have different sub-register ↵Evan Cheng2010-05-111-2/+4
| | | | | | indices. llvm-svn: 103450
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-061-3/+6
| | | | | | doesn't have to guess. llvm-svn: 103194
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-061-10/+11
| | | | llvm-svn: 103193
* Remove DBG_VALUE which reference dead stack slots.Evan Cheng2010-04-291-2/+19
| | | | llvm-svn: 102654
* Fix a number of clang -Wsign-compare warnings that didn't have an obviousJohn McCall2010-04-061-1/+1
| | | | | | | solution. The only reason these don't fire with gcc-4.2 is that gcc turns off part of -Wsign-compare in C++ on accident. llvm-svn: 100581
* Code clean up. Move includes from VirtRegRewriter.h to VirtRegRewriter.cpp.Evan Cheng2010-04-061-0/+2
| | | | llvm-svn: 100532
* Avoid being influenced by the presence of dbg_value instructions.Evan Cheng2010-03-301-4/+15
| | | | llvm-svn: 99879
* Debug info shouldn't affect kills.Dale Johannesen2010-03-261-0/+3
| | | | llvm-svn: 99637
* Extract methods from LocalRewriter::RewriteMBB bringing it down to 666 lines.Jakob Stoklund Olesen2010-03-111-168/+197
| | | | llvm-svn: 98295
* VirtRegRewriter spring cleaning. No functional change.Jakob Stoklund Olesen2010-03-111-1255/+1292
| | | | | | | Move methods out of line and M-x whitespace-cleanup. Promote common method arguments to member variables. llvm-svn: 98207
* Uniformize the way these options are printed. Requested byDuncan Sands2010-02-181-1/+1
| | | | | | Russell Wallace. llvm-svn: 96580
* Fix PR6283.Jakob Stoklund Olesen2010-02-131-15/+16
| | | | | | | | | | | When coalescing with a physreg, remember to add imp-def and imp-kill when dealing with sub-registers. Also fix a related bug in VirtRegRewriter where substitutePhysReg may reallocate the operand list on an instruction and invalidate the reg_iterator. This can happen when a register is mentioned twice on the same instruction. llvm-svn: 96072
* fix a layering violation: VirtRegRewriter.cpp shouldn't use AsmPrinter.h.Chris Lattner2010-02-101-4/+3
| | | | llvm-svn: 95748
* fix missing #includes.Chris Lattner2010-02-101-0/+1
| | | | llvm-svn: 95745
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-3/+2
| | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
* Add <imp-def> and <imp-kill> operands when replacing virtual sub-register ↵Jakob Stoklund Olesen2010-01-061-17/+37
| | | | | | | | | | | | | | defs and kills. An instruction like this: %reg1097:1<def> = VMOVSR %R3<kill>, 14, %reg0 Must be replaced with this when substituting physical registers: %S0<def> = VMOVSR %R3<kill>, 14, %reg0, %D0<imp-def> llvm-svn: 92812
* Change errs() to dbgs().David Greene2010-01-051-45/+45
| | | | llvm-svn: 92590
* improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner2009-12-031-14/+14
| | | | | | Patch by Howard Hinnant! llvm-svn: 90365
* Add MachineBasicBlock::getName, and use it in place of getBasicBlock()->getName.Jakob Stoklund Olesen2009-11-201-1/+1
| | | | | | Fix debug code that assumes getBasicBlock never returns NULL. llvm-svn: 89428
* Fixed the in-place spiller and trivial rewriter, which had been broken by ↵Lang Hames2009-11-181-10/+21
| | | | | | the recent SlotIndexes work. llvm-svn: 89238
* Added getSubRegIndex(A,B) that returns subreg index of A to B. Use it to ↵Evan Cheng2009-11-141-5/+2
| | | | | | replace broken code in VirtRegRewriter. llvm-svn: 88753
* - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.Evan Cheng2009-11-141-2/+2
| | | | | | | | - If destination is a physical register and it has a subreg index, use the sub-register instead. This fixes PR5423. llvm-svn: 88745
* Fix PR5412: Fix an inverted check and another missing sub-register check.Evan Cheng2009-11-141-9/+30
| | | | llvm-svn: 88738
* Fix PR5411. Bug in UpdateKills. A reg def partially define its super-registers.Evan Cheng2009-11-131-0/+4
| | | | llvm-svn: 88719
* Set the ReloadReuse AsmPrinter flag where appropriate.David Greene2009-11-121-0/+3
| | | | llvm-svn: 87030
* When there is a 2-instruction spill sequence, recordDale Johannesen2009-10-291-2/+3
| | | | | | | | the second (store) instruction in SpillSlotToUsesMap consistently. I don't think this matters functionally, but it's cleaner and Evan wants it this way. llvm-svn: 85463
* When we generate spill code, then decide we don't needDale Johannesen2009-10-281-1/+4
| | | | | | | | | | to spill after all, we weren't handling 2-instruction spill sequences correctly (PPC Altivec). We need to remove the store in this case. Removing the other instruction(s) would be goodness but is not needed for correctness, and isn't done here. 7331562. llvm-svn: 85437
* - Revert some changes from 85044, 85045, and 85047 that broke x86_64 tests andEvan Cheng2009-10-261-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | bootstrapping. It's not safe to leave identity subreg_to_reg and insert_subreg around. - Relax register scavenging to allow use of partially "not-live" registers. It's common for targets to operate on registers where the top bits are undef. e.g. s0 = d0 = insert_subreg d0<undef>, s0, 1 ... = d0 When the insert_subreg is eliminated by the coalescer, the scavenger used to complain. The previous fix was to keep to insert_subreg around. But that's brittle and it's overly conservative when we want to use the scavenger to allocate registers. It's actually legal and desirable for other instructions to use the "undef" part of d0. e.g. s0 = d0 = insert_subreg d0<undef>, s0, 1 ... s1 = = s1 = d0 We probably need add a "partial-undef" marker on machine operand so the machine verifier would not complain. llvm-svn: 85091
* Use isIdentityCopy. Fix a bozo bug (flipped condition) in InvalidateRegDef.Evan Cheng2009-10-251-5/+5
| | | | llvm-svn: 85047
* Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky2009-10-251-1/+0
| | | | | | VISIBILITY_HIDDEN removal. llvm-svn: 85043
* Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky2009-10-251-4/+4
| | | | | | | Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. llvm-svn: 85042
* Revert the kludge in 76703. I got a cleanDale Johannesen2009-10-121-2/+25
| | | | | | | | | bootstrap of FSF-style PPC, so there is some reason to believe the original bug (which was never analyzed) has been fixed, probably by 82266. llvm-svn: 83871
* Remove some unused variables and methods warned about byDuncan Sands2009-09-061-2/+1
| | | | | | icc (#177, partial). Patch by Erick Tryzelaar. llvm-svn: 81106
* Fixed a test that ensures the LocalRewriter does not attempt toLang Hames2009-09-031-1/+1
| | | | | | | | | avoid reloads by reusing clobbered registers. This was causing issues in 256.bzip2 when compiled with PIC for a while (starting at r78217), though the problem has since been masked. llvm-svn: 80872
* Fix PR4753.Jakob Stoklund Olesen2009-08-231-1/+15
| | | | | | | | When undoing a reuse in ReuseInfo::GetRegForReload, check if it was only a sub-register being used. The MachineOperand::getSubReg() method is only valid for virtual registers, so we have to recover the sub-register index manually. llvm-svn: 79855
* Kill off more cerr/cout uses and prune includes a bit.Benjamin Kramer2009-08-231-1/+7
| | | | llvm-svn: 79852
* remove some DOUTsChris Lattner2009-08-231-57/+62
| | | | llvm-svn: 79812
* Update LocalRewriter::DistanceMap when inserting stack loads.Jakob Stoklund Olesen2009-08-151-0/+3
| | | | | | | | In the included test case, a stack load was not included in DistanceMap. That caused TransferDeadness to ignore the instruction, leading to a scavenger assert. llvm-svn: 79090
* Fix a bunch of namespace pollution.Dan Gohman2009-08-071-2/+16
| | | | llvm-svn: 78363
* Add reload and remat backscheduling. This is disabled by default. UseDavid Greene2009-07-281-26/+150
| | | | | | -schedule-spills=true to enable. llvm-svn: 77327
* More migration to raw_ostream, the water has dried up around the iostream hole.Daniel Dunbar2009-07-251-5/+7
| | | | | | | | | | - Some clients which used DOUT have moved to DEBUG. We are deprecating the "magic" DOUT behavior which avoided calling printing functions when the statement was disabled. In addition to being unnecessary magic, it had the downside of leaving code in -Asserts builds, and of hiding potentially unnecessary computations. llvm-svn: 77019
* Let each target determines whether a machine instruction is dead. If true, ↵Evan Cheng2009-07-221-25/+2
| | | | | | | | that allows late codeine passes to delete it. This is considered a workaround. The problem is some targets are not modeling side effects correctly. PPC is apparently one of those. This patch allows ppc llvm-gcc to bootstrap on Darwin. Once we find out which instruction definitions are wrong, we can remove the PPCInstrInfo workaround. llvm-svn: 76703
* Another rewriter bug exposed by recent coalescer changes. ↵Evan Cheng2009-07-211-23/+27
| | | | | | ReuseInfo::GetRegForReload() should make sure the "switched" register is in the desired register class. I'm surprised this hasn't caused more failures in the past. llvm-svn: 76558
* Enable cross register class coalescing.Evan Cheng2009-07-181-4/+35
| | | | llvm-svn: 76281
* Fix my brain cramp by inverting the assertion condition.Evan Cheng2009-07-171-3/+1
| | | | llvm-svn: 76131
* Disable this assert for now, it is firing on an llvm-gcc bootstrap. :(Daniel Dunbar2009-07-161-0/+2
| | | | llvm-svn: 76123
* Fix inverted preprocessor conditional.Daniel Dunbar2009-07-161-1/+1
| | | | llvm-svn: 76111
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