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path: root/llvm/lib/CodeGen/VirtRegRewriter.cpp
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* Delete VirtRegRewriter.Jakob Stoklund Olesen2011-11-131-2633/+0
| | | | | | And there was much rejoicing. llvm-svn: 144480
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-10/+10
| | | | | | | | sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. llvm-svn: 134021
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-2/+2
| | | | | | Luis Felipe Strano Moraes! llvm-svn: 129558
* Fix evil VirtRegRewriter bug.Jakob Stoklund Olesen2011-03-301-0/+28
| | | | | | | | | | | | | | | The rewriter can keep track of multiple stack slots in the same register if they happen to have the same value. When an instruction modifies a stack slot by defining a register that is mapped to a stack slot, other stack slots in that register are no longer valid. This is a very rare problem, and I don't have a simple test case. I get the impression that VirtRegRewriter knows it is about to be deleted, inventing a last opaque problem. <rdar://problem/9204040> llvm-svn: 128562
* Teach VirtRegRewriter about the new virtual register numbers. No functional ↵Jakob Stoklund Olesen2011-03-301-10/+11
| | | | | | change. llvm-svn: 128561
* VirtRegRewriter assertion fix.Andrew Trick2011-02-221-2/+4
| | | | | | | Apparently it's ok for multiple operands to "kill" the same register. Fixes PR9237. llvm-svn: 126190
* Remove a duplicated check.Evan Cheng2011-02-161-1/+1
| | | | llvm-svn: 125625
* VirtRegRewriter fix: update kill flags, which are used by the scavenger.Andrew Trick2011-01-271-64/+88
| | | | | | | | | | | | | | | | | | | | | | | rdar://problem/8893967: JM/lencod miscompile at -arch armv7 -mthumb -O3 Added ResurrectKill to remove kill flags after we decide to reused a physical register. And (hopefully) ensure that we call it in all the right places. Sorry, I'm not checking in a unit test given that it's a miscompile I can't reproduce easily with a toy example. Failures in the rewriter depend on a series of heuristic decisions maked during one of the many upstream phases in codegen. This case would require coercing regalloc to generate a couple of rematerialzations in a way that causes the scavenger to reuse the same register at just the wrong point. The general way to test this is to implement kill flags verification. Then we could have a simple, robust compile-only unit test. That would be worth doing if the whole pass was not about to disappear. At this point we focus verification work on the next generation of regalloc. llvm-svn: 124442
* Teach VirtRegRewriter to update slot indexes when erasing instructions.Jakob Stoklund Olesen2011-01-121-38/+26
| | | | | | It was leaving dangling pointers in the slot index maps. llvm-svn: 123334
* Annotate VirtRegRewriter debug output with slot indexes.Jakob Stoklund Olesen2011-01-121-2/+2
| | | | llvm-svn: 123333
* Do not model all INLINEASM instructions as having unmodelled side effects.Evan Cheng2011-01-071-2/+9
| | | | | | | | | | Instead encode llvm IR level property "HasSideEffects" in an operand (shared with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check the operand when the instruction is an INLINEASM. This allows memory instructions to be moved around INLINEASM instructions. llvm-svn: 123044
* DBG_VALUE does not have any side effects; it also makes no sense to mark it ↵Evan Cheng2011-01-071-1/+2
| | | | | | cheap as a copy. llvm-svn: 123031
* Prune includes.Benjamin Kramer2010-11-061-1/+1
| | | | llvm-svn: 118342
* Properly handle reloading and spilling around partial redefines inJakob Stoklund Olesen2010-10-111-0/+14
| | | | | | | | | | | | LocalRewriter. This is a bit of a hack that adds an implicit use operand to model the read-modify-write nature of a partial redef. Uses and defs are rewritten in separate passes, and a single operand would never be processed twice. <rdar://problem/8518892> llvm-svn: 116210
* Per discussion with Sanjiv, remove the PIC16 target from mainline. When/ifChris Lattner2010-10-111-1/+1
| | | | | | | it comes back, it will be largely a rewrite, so keeping the old codebase in tree isn't helping anyone. llvm-svn: 116190
* Extract method ProcessUses from LocalRewriter::RewriteMBB. Both parent and childJakob Stoklund Olesen2010-10-081-320/+336
| | | | | | | | are still way too long, but it's a start. No functional change intended. llvm-svn: 116116
* Don't add <imp-def> operands during register rewriting.Jakob Stoklund Olesen2010-09-071-16/+9
| | | | | | | | | | | | | | LiveIntervals already adds <imp-def> operands for super-registers when a subreg def defines the whole register. Thus, it is not necessary to do it again when rewriting. In fact, the super-register imp-defs caused miscompilations because the late scheduler couldn't see that the super-register was read. We still add super-reg <imp-use,kill> operands when rewriting virtuals to physicals. llvm-svn: 113299
* VirtRegRewriter checks for early clobbers before it reuses an available stackJakob Stoklund Olesen2010-09-031-5/+7
| | | | | | | | | | | | slot. Teach it to also check for early clobbered aliases, and early clobber operands following the current operand. This fixes the miscompilation in PR8044 where EC registers eax and ecx were being used for inputs. llvm-svn: 112988
* Avoid using a live std::multimap iterator while editing the map. It looks likeJakob Stoklund Olesen2010-08-051-7/+13
| | | | | | | we sometimes compare singular iterators, reported by ENABLE_EXPENSIVE_CHECKS. This fixes PR7825. llvm-svn: 110355
* 80 columnJim Grosbach2010-07-271-4/+4
| | | | llvm-svn: 109513
* fix typoJim Grosbach2010-07-271-1/+1
| | | | llvm-svn: 109511
* Remove remaining calls to TII::isMoveInstr.Jakob Stoklund Olesen2010-07-161-36/+0
| | | | llvm-svn: 108556
* Convert the last getPhysicalRegisterRegClass in VirtRegRewriter.cpp toRafael Espindola2010-07-121-1/+1
| | | | | | | | | getMinimalPhysRegClass. It was used to produce spills, and it is better to use the most specific class if possible. Update getLoadStoreRegOpcode to handle GR32_AD. llvm-svn: 108115
* Convert uses of getPhysicalRegisterRegClass in VirtRegRewriter.cpp.Rafael Espindola2010-07-111-2/+2
| | | | | | | | | | | | The first one was used just to call isSafeToMoveRegClassDefs. In general, using a more specific reg class is better, in practice only x86 implements that method and the results are always the same. The second one is in FindFreeRegister and is used to check if a register is in a register class, a much more direct call to contains is better as it should cover more cases and is faster. llvm-svn: 108093
* Replace copyRegToReg with COPY everywhere in lib/CodeGen except for FastISel.Jakob Stoklund Olesen2010-07-101-30/+11
| | | | llvm-svn: 108062
* Change TII::foldMemoryOperand API to require the machine instruction to beJakob Stoklund Olesen2010-07-091-8/+8
| | | | | | | | | | | | | | inserted in a MBB, and return an already inserted MI. This target API change is necessary to allow foldMemoryOperand to call storeToStackSlot and loadFromStackSlot when folding a COPY to a stack slot reference in a target independent way. The foldMemoryOperandImpl hook is going to change in the same way, but I'll wait until COPY folding is actually implemented. Most targets only fold copies and won't need to specialize this hook at all. llvm-svn: 107991
* Handle COPY in VirtRegRewriter.Jakob Stoklund Olesen2010-07-091-0/+28
| | | | llvm-svn: 107949
* Convert EXTRACT_SUBREG to COPY when emitting machine instrs.Jakob Stoklund Olesen2010-07-081-1/+1
| | | | | | | | | EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead. Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg(). The isMoveInstr hook will be removed later. llvm-svn: 107879
* Cosmetic.Dale Johannesen2010-06-251-5/+2
| | | | llvm-svn: 106865
* Fix a case where an earlyclobber operand of an asmDale Johannesen2010-06-251-0/+17
| | | | | | | | is reused as an input. PR 4118. Testcase is too big, as usual with bugs in this area, but there's one in the PR. llvm-svn: 106816
* Slightly change the meaning of the reMaterialize target hook when the originalJakob Stoklund Olesen2010-06-021-2/+1
| | | | | | | | | | | | | | | | | | | | | | | instruction defines subregisters. Any existing subreg indices on the original instruction are preserved or composed with the new subreg index. Also substitute multiple operands mentioning the original register by using the new MachineInstr::substituteRegister() function. This is necessary because there will soon be <imp-def> operands added to non read-modify-write partial definitions. This instruction: %reg1234:foo = FLAP %reg1234<imp-def> will reMaterialize(%reg3333, bar) like this: %reg3333:bar-foo = FLAP %reg333:bar<imp-def> Finally, replace the TargetRegisterInfo pointer argument with a reference to indicate that it cannot be NULL. llvm-svn: 105358
* Teach VirtRegRewriter to handle spilling in instructions that have multipleJakob Stoklund Olesen2010-05-211-1/+7
| | | | | | | | | | | | | definitions of the virtual register. This happens when spilling the registers produced by REG_SEQUENCE: %reg1047:5<def>, %reg1047:6<def>, %reg1047:7<def> = VLD3d8 %reg1033, 0, pred:14, pred:%reg0 The rewriter would spill the register multiple times, dead store elimination tried to keep up, but ended up cutting the branch it was sitting on. llvm-svn: 104321
* It's not safe eliminate copies where src and dst have different sub-register ↵Evan Cheng2010-05-111-2/+4
| | | | | | indices. llvm-svn: 103450
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-061-3/+6
| | | | | | doesn't have to guess. llvm-svn: 103194
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-061-10/+11
| | | | llvm-svn: 103193
* Remove DBG_VALUE which reference dead stack slots.Evan Cheng2010-04-291-2/+19
| | | | llvm-svn: 102654
* Fix a number of clang -Wsign-compare warnings that didn't have an obviousJohn McCall2010-04-061-1/+1
| | | | | | | solution. The only reason these don't fire with gcc-4.2 is that gcc turns off part of -Wsign-compare in C++ on accident. llvm-svn: 100581
* Code clean up. Move includes from VirtRegRewriter.h to VirtRegRewriter.cpp.Evan Cheng2010-04-061-0/+2
| | | | llvm-svn: 100532
* Avoid being influenced by the presence of dbg_value instructions.Evan Cheng2010-03-301-4/+15
| | | | llvm-svn: 99879
* Debug info shouldn't affect kills.Dale Johannesen2010-03-261-0/+3
| | | | llvm-svn: 99637
* Extract methods from LocalRewriter::RewriteMBB bringing it down to 666 lines.Jakob Stoklund Olesen2010-03-111-168/+197
| | | | llvm-svn: 98295
* VirtRegRewriter spring cleaning. No functional change.Jakob Stoklund Olesen2010-03-111-1255/+1292
| | | | | | | Move methods out of line and M-x whitespace-cleanup. Promote common method arguments to member variables. llvm-svn: 98207
* Uniformize the way these options are printed. Requested byDuncan Sands2010-02-181-1/+1
| | | | | | Russell Wallace. llvm-svn: 96580
* Fix PR6283.Jakob Stoklund Olesen2010-02-131-15/+16
| | | | | | | | | | | When coalescing with a physreg, remember to add imp-def and imp-kill when dealing with sub-registers. Also fix a related bug in VirtRegRewriter where substitutePhysReg may reallocate the operand list on an instruction and invalidate the reg_iterator. This can happen when a register is mentioned twice on the same instruction. llvm-svn: 96072
* fix a layering violation: VirtRegRewriter.cpp shouldn't use AsmPrinter.h.Chris Lattner2010-02-101-4/+3
| | | | llvm-svn: 95748
* fix missing #includes.Chris Lattner2010-02-101-0/+1
| | | | llvm-svn: 95745
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-3/+2
| | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
* Add <imp-def> and <imp-kill> operands when replacing virtual sub-register ↵Jakob Stoklund Olesen2010-01-061-17/+37
| | | | | | | | | | | | | | defs and kills. An instruction like this: %reg1097:1<def> = VMOVSR %R3<kill>, 14, %reg0 Must be replaced with this when substituting physical registers: %S0<def> = VMOVSR %R3<kill>, 14, %reg0, %D0<imp-def> llvm-svn: 92812
* Change errs() to dbgs().David Greene2010-01-051-45/+45
| | | | llvm-svn: 92590
* improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner2009-12-031-14/+14
| | | | | | Patch by Howard Hinnant! llvm-svn: 90365
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