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| author | Daniel Dunbar <daniel@zuster.org> | 2009-07-16 22:08:25 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2009-07-16 22:08:25 +0000 |
| commit | 87b85dd4dceac2d781eca0c4f19f7e2b8c8af354 (patch) | |
| tree | 524d52f9ba01fd3eb828387c4c3e72764402f424 /llvm/lib/CodeGen/VirtRegRewriter.cpp | |
| parent | bfc2d8e5debd1ee5af33fd5746a731f4bcdf86f5 (diff) | |
| download | bcm5719-llvm-87b85dd4dceac2d781eca0c4f19f7e2b8c8af354.tar.gz bcm5719-llvm-87b85dd4dceac2d781eca0c4f19f7e2b8c8af354.zip | |
Fix inverted preprocessor conditional.
llvm-svn: 76111
Diffstat (limited to 'llvm/lib/CodeGen/VirtRegRewriter.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/VirtRegRewriter.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/VirtRegRewriter.cpp b/llvm/lib/CodeGen/VirtRegRewriter.cpp index a859d80e1b7..61ea80b3d9d 100644 --- a/llvm/lib/CodeGen/VirtRegRewriter.cpp +++ b/llvm/lib/CodeGen/VirtRegRewriter.cpp @@ -491,7 +491,7 @@ static void ReMaterialize(MachineBasicBlock &MBB, const TargetRegisterInfo *TRI, VirtRegMap &VRM) { MachineInstr *ReMatDefMI = VRM.getReMaterializedMI(Reg); -#ifdef NDEBUG +#ifndef NDEBUG const TargetInstrDesc &TID = ReMatDefMI->getDesc(); assert(TID.getNumDefs() != 1 && "Don't know how to remat instructions that define > 1 values!"); |
