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* Fix signed/unsigned comparison warning. NFCI.Simon Pilgrim2019-07-241-1/+1
* [DAGCombine] matchBinOpReduction - add partial reduction matchingSimon Pilgrim2019-07-241-7/+32
* [SelectionDAG] makeEquivalentMemoryOrdering - early out for equal chains (PR4...Simon Pilgrim2019-07-241-1/+1
* [SDAG] convert (sub x, 1) to (add x, -1) in ctpop expansion; NFCSanjay Patel2019-07-241-3/+3
* [TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support.Simon Pilgrim2019-07-231-0/+23
* [TargetLowering] Add SimplifyMultipleUseDemandedBitsSimon Pilgrim2019-07-231-1/+128
* [DAGCombiner] Make ShrinkLoadReplaceStoreWithStore return an SDValue instead ...Craig Topper2019-07-231-9/+8
* [DAGCombiner] Use SDNode::isOperandOf to simplify some code. NFCICraig Topper2019-07-231-7/+1
* Move variable out from debug only section.Richard Trieu2019-07-231-2/+0
* [Statepoints] Fix a bug in statepoint lowering for functions w/no-realign-stackPhilip Reames2019-07-221-1/+8
* TableGen: Support physical register inputs > 255Matt Arsenault2019-07-221-1/+4
* Added address-space mangling for stack related intrinsicsChristudasan Devadasan2019-07-221-2/+2
* [IPRA][ARM] Make use of the "returned" parameter attributeOliver Stannard2019-07-221-0/+2
* [Codegen][SelectionDAG] X u% C == 0 fold: non-splat vector improvementsRoman Lebedev2019-07-201-35/+132
* DAG: Handle dbg_value for arguments split into multiple subregsMatt Arsenault2019-07-191-23/+52
* [COFF] Change a variable type to be const in the HeapAllocSite map.Amy Huang2019-07-181-1/+1
* [DAGCombine] Pull getSubVectorSrc helper out of narrowInsertExtractVectorBinO...Simon Pilgrim2019-07-181-22/+22
* Basic codegen for MTE stack tagging.Evgeniy Stepanov2019-07-171-0/+13
* [DAGCombiner] fold (addcarry (xor a, -1), b, c) -> (subcarry b, a, !c) and fl...Amaury Sechet2019-07-161-16/+28
* Fix parameter name comments using clang-tidy. NFC.Rui Ueyama2019-07-162-16/+16
* [DAGCombine] narrowExtractedVectorBinOp - wrap subvector extraction in helper...Simon Pilgrim2019-07-121-9/+11
* [DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS supportSimon Pilgrim2019-07-111-4/+14
* OpaquePtr: use byval accessor instead of inspecting pointer type. NFC.Tim Northover2019-07-111-3/+2
* [SDAG] commute setcc operands to match a subtractSanjay Patel2019-07-101-0/+11
* Move three folds for FADD, FSUB and FMUL in the DAG combiner away from Unsafe...Michael Berg2019-07-101-4/+4
* [TargetLowering] support BlockAddress as "i" inline asm constraintNick Desaulniers2019-07-101-0/+7
* [DAGCombine] visitINSERT_SUBVECTOR - use uint64_t subvector index. NFCI.Simon Pilgrim2019-07-101-1/+1
* Fix const/non-const lambda return type warning. NFCI.Simon Pilgrim2019-07-101-1/+1
* [X86][AMDGPU][DAGCombiner] Move call to allowsMemoryAccess into isLoadBitCast...Craig Topper2019-07-091-15/+8
* [DAGCombine] LoadedSlice - keep getOffsetFromBase() uint64_t offset. NFCI.Simon Pilgrim2019-07-091-1/+1
* OpaquePtr: add Type parameter to Loads analysis API.Tim Northover2019-07-091-2/+4
* [SelectionDAG] Simplify some calls to getSetCCResultType. NFCBjorn Pettersson2019-07-093-8/+4
* [LegalizeTypes] Fix saturation bug for smul.fix.satBjorn Pettersson2019-07-091-3/+3
* Fixing @llvm.memcpy not honoring volatile.Guillaume Chatelet2019-07-091-19/+24
* Standardize on MSVC behavior for triples with no environmentReid Kleckner2019-07-081-1/+1
* [TargetLowering] SimplifyDemandedBits - just call computeKnownBits for BUILD_...Simon Pilgrim2019-07-081-23/+3
* [DAGCombine] convertBuildVecZextToZext - remove duplicate getOpcode() call. N...Simon Pilgrim2019-07-061-1/+1
* [DAGCombiner] Don't combine (addcarry (uaddo X, Y), 0, Carry) -> (addcarry X,...Craig Topper2019-07-041-1/+4
* [CodeGen] Make branch funnels pass the machine verifierFrancis Visoiu Mistrih2019-07-031-1/+1
* Use getAllOnesConstants instead of -1 in DAGCombiner. NFCAmaury Sechet2019-07-031-1/+1
* [DAGCombine] More diamong carry pattern optimization.Amaury Sechet2019-07-031-27/+92
* [SelectionDAG] Propagate alias metadata to target intrinsic nodesJames Molloy2019-07-032-6/+8
* [Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)Roman Lebedev2019-07-031-0/+31
* [NFC][TargetLowering] Some preparatory cleanups around 'prepareUREMEqFold()' ...Roman Lebedev2019-07-021-17/+18
* [DAGCombiner] Exploiting more about the transformation of TransformFPLoadStor...Zi Xuan Wu2019-07-021-4/+2
* [SelectionDAG] Do minnum->minimum at legalization time instead of building timeBenjamin Kramer2019-07-012-16/+17
* [SelectionDAG] Use the memory VT instead of result VT for FoldingSet profilin...Craig Topper2019-06-301-3/+2
* [CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 3)Roman Lebedev2019-06-271-0/+109
* Revert "[CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM cas...Roman Lebedev2019-06-271-107/+0
* [CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 2)Roman Lebedev2019-06-271-0/+107
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