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path: root/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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* [SimplifyDemandedBits] Use APInt::intersects to instead of ANDing and compari...Craig Topper2019-09-171-2/+3
* [TargetLowering] SimplifyDemandedBits - add EXTRACT_SUBVECTOR support.Simon Pilgrim2019-09-141-0/+15
* [SDAG] Update generic code to conservatively check for isAtomic in addition t...Philip Reames2019-09-121-1/+1
* GlobalISel: add combiner to form indexed loads.Tim Northover2019-09-091-1/+1
* [CodeGen] Handle SMULFIXSAT with scale zero in TargetLowering::expandFixedPoi...Bjorn Pettersson2019-09-071-10/+21
* [Intrinsic] Add the llvm.umul.fix.sat intrinsicBjorn Pettersson2019-09-071-19/+56
* [TargetLowering] Fix Bugzilla ID 43183 to avoid soften comparison broken with...Shiva Chen2019-09-011-10/+7
* [TargetLowering] SimplifyDemandedBits ADD/SUB/MUL - correctly inherit SDNodeF...Simon Pilgrim2019-08-301-4/+2
* [RISCV] Avoid generating AssertZext for LP64 ABI when lowering floating LibCallShiva Chen2019-08-281-5/+25
* [FPEnv] Add fptosi and fptoui constrained intrinsics.Kevin P. Neal2019-08-281-9/+39
* [TargetLowering] Add buildLegalVectorShuffle facility to help build legal shu...Amaury Sechet2019-08-281-5/+24
* [SelectionDAG][X86] Enable iX SimplifyDemandedBits to vXi1 SimplifyDemandedVe...Craig Topper2019-08-231-3/+1
* [TargetLowering] Remove optional arguments passing to makeLibCallShiva Chen2019-08-221-20/+18
* [TargetLowering] x s% C == 0 fold: vector divisor with INT_MIN handlingRoman Lebedev2019-08-191-13/+66
* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-1/+1
* Remove BitVector.h include. NFCI.Simon Pilgrim2019-08-151-1/+0
* [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)Roman Lebedev2019-08-131-5/+221
* [TargetLowering][NFC] prepareUREMEqFold(): fixup commentRoman Lebedev2019-08-131-1/+1
* Revert r368276 "[TargetLowering] SimplifyDemandedBits - call SimplifyMultiple...Hans Wennborg2019-08-131-11/+0
* [TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits ...Simon Pilgrim2019-08-121-0/+5
* [TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits ...Simon Pilgrim2019-08-081-0/+11
* [TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits ...Simon Pilgrim2019-08-071-4/+19
* [GISel]: Add GISelKnownBits analysisAditya Nandakumar2019-08-061-0/+6
* [TargetLowering] SimplifyMultipleUseDemandedBits - return UNDEF for undemande...Simon Pilgrim2019-08-061-1/+10
* [TargetLowering][X86] Teach SimplifyDemandedVectorElts to replace the base ve...Craig Topper2019-08-041-0/+9
* Emit diagnostic if an inline asm constraint requires an immediateBill Wendling2019-08-031-7/+11
* [TargetLowering] SimplifyMultipleUseDemandedBits - don't assume INSERT_VECTOR...Simon Pilgrim2019-08-021-1/+1
* [TargetLowering] SimplifyMultipleUseDemandedBits - Add ISD::INSERT_VECTOR_ELT...Simon Pilgrim2019-08-011-0/+10
* [TargetLowering] SimplifyMultipleUseDemandedBits - add BITCAST pass through s...Simon Pilgrim2019-07-271-2/+59
* [SelectionDAG] Check for any recursion depth greater than or equal to limit i...Simon Pilgrim2019-07-271-2/+2
* [TargetLowering] Add depth limit to SimplifyMultipleUseDemandedBitsSimon Pilgrim2019-07-271-0/+3
* Revert r367091, it caused PR42777.Nico Weber2019-07-261-59/+2
* [TargetLowering] SimplifyMultipleUseDemandedBits - add SIGN_EXTEND_INREG supp...Simon Pilgrim2019-07-261-0/+7
* [TargetLowering] SimplifyMultipleUseDemandedBits - add BITCAST pass through s...Simon Pilgrim2019-07-261-2/+59
* [Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 foldRoman Lebedev2019-07-241-0/+79
* [SDAG] convert (sub x, 1) to (add x, -1) in ctpop expansion; NFCSanjay Patel2019-07-241-3/+3
* [TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support.Simon Pilgrim2019-07-231-0/+23
* [TargetLowering] Add SimplifyMultipleUseDemandedBitsSimon Pilgrim2019-07-231-1/+128
* [Codegen][SelectionDAG] X u% C == 0 fold: non-splat vector improvementsRoman Lebedev2019-07-201-35/+132
* [SDAG] commute setcc operands to match a subtractSanjay Patel2019-07-101-0/+11
* [TargetLowering] support BlockAddress as "i" inline asm constraintNick Desaulniers2019-07-101-0/+7
* [TargetLowering] SimplifyDemandedBits - just call computeKnownBits for BUILD_...Simon Pilgrim2019-07-081-23/+3
* [NFC][TargetLowering] Some preparatory cleanups around 'prepareUREMEqFold()' ...Roman Lebedev2019-07-021-17/+18
* [SelectionDAG] Do minnum->minimum at legalization time instead of building timeBenjamin Kramer2019-07-011-0/+11
* [CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 3)Roman Lebedev2019-06-271-0/+109
* Revert "[CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM cas...Roman Lebedev2019-06-271-107/+0
* [CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 2)Roman Lebedev2019-06-271-0/+107
* [TargetLowering] SimplifyDemandedVectorElts - add shift/rotate support.Simon Pilgrim2019-06-271-0/+18
* [TargetLowering] SimplifyDemandedBits - use DemandedElts to better identify p...Simon Pilgrim2019-06-271-11/+21
* [SDAG] expand ctpop != 1Sanjay Patel2019-06-251-11/+11
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