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path: root/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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* [SelectionDAG] Initial support for FSHL/FSHR funnel shift opcodes (PR39467)Simon Pilgrim2018-12-051-0/+6
* [SelectionDAG] Split very large token factors for loads into 64k chunks.Amara Emerson2018-12-051-2/+13
* [SelectionDAG] Compute known bits and num sign bits for live out vector regis...Craig Topper2018-11-201-2/+2
* [IR] Add a dedicated FNeg IR InstructionCameron McInally2018-11-131-0/+9
* Add support for llvm.is.constant intrinsic (PR4898)James Y Knight2018-11-071-0/+7
* [FPEnv] Add constrained CEIL/FLOOR/ROUND/TRUNC intrinsicsCameron McInally2018-11-051-0/+16
* [COFF, ARM64] Implement Intrinsic.sponentry for AArch64Mandeep Singh Grang2018-11-011-0/+4
* Revert "[COFF, ARM64] Implement Intrinsic.sponentry for AArch64"Mandeep Singh Grang2018-11-011-4/+0
* [COFF, ARM64] Implement Intrinsic.sponentry for AArch64Mandeep Singh Grang2018-10-311-0/+4
* [SelectionDAG] Handle constant range [0,1) in lowerRangeToAssertZExtScott Linder2018-10-311-1/+2
* [FPEnv] [FPEnv] Add constrained intrinsics for MAXNUM and MINNUMCameron McInally2018-10-301-0/+8
* [Intrinsic] Signed and Unsigned Saturation Subtraction IntirnsicsLeonard Chan2018-10-291-0/+12
* Reland "[WebAssembly] LSDA info generation"Heejin Ahn2018-10-251-5/+5
* [NFC] Rename minnan and maxnan to minimum and maximumThomas Lively2018-10-241-14/+14
* [SelectionDAG] use 'match' to simplify code; NFCSanjay Patel2018-10-231-8/+8
* [Intrinsic] Unigned Saturation Addition IntrinsicLeonard Chan2018-10-221-0/+6
* Revert "[WebAssembly] LSDA info generation"Krasimir Georgiev2018-10-161-5/+5
* [Intrinsic] Signed Saturation Addition IntrinsicLeonard Chan2018-10-161-0/+6
* [WebAssembly] LSDA info generationHeejin Ahn2018-10-161-5/+5
* [TI removal] Make variables declared as `TerminatorInst` and initializedChandler Carruth2018-10-151-1/+1
* [Intrinsic] Add llvm.minimum and llvm.maximum instrinsic functionsThomas Lively2018-10-131-0/+12
* [SelectionDAGBuilder][NFC] Pass LHSTy to getShiftAmountTy rather than RHSTyAlex Bradbury2018-10-081-1/+1
* llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)Fangrui Song2018-09-271-4/+3
* Unify landing pad information adding routines (NFC)Heejin Ahn2018-09-251-3/+0
* DAG: Handle odd vector sizes in calling conv splittingMatt Arsenault2018-09-101-12/+17
* DAG: Factor out helper function for odd vector sizesMatt Arsenault2018-09-041-22/+28
* DAG: Don't use ABI copies in some contextsMatt Arsenault2018-08-301-2/+3
* [IR] Replace `isa<TerminatorInst>` with `isTerminator()`.Chandler Carruth2018-08-261-2/+2
* [WebAssembly] Don't make wasm cleanuppads into funclet entriesHeejin Ahn2018-08-211-3/+8
* [MISC]Fix wrong usage of std::equal()Chen Zheng2018-08-171-1/+1
* [SDAG] Remove the reliance on MI's allocation strategy forChandler Carruth2018-08-141-4/+3
* [SelectionDAG] try harder to convert funnel shift to rotateSanjay Patel2018-08-091-3/+10
* test commit accessTies Stuij2018-08-081-4/+4
* Support inline asm with multiple 64bit output in 32bit GPRThomas Preud'homme2018-08-081-16/+37
* [DebugInfo] Refactor DbgInfoIntrinsic class hierarchy.Hsiangkai Wang2018-08-061-1/+1
* [SelectionDAG] fix bug in translating funnel shift with non-power-of-2 typeSanjay Patel2018-08-011-31/+39
* DAG: Correct pointer type used for stack slotMatt Arsenault2018-07-311-1/+2
* Remove trailing spaceFangrui Song2018-07-301-1/+1
* Reapply "Fix crash on inline asm with 64bit matching input in 32bit GPR"Thomas Preud'homme2018-07-301-9/+23
* revert r338206 because the test does not passSanjay Patel2018-07-291-23/+9
* Fix crash on inline asm with 64bit matching input in 32bit GPRThomas Preud'homme2018-07-281-9/+23
* DAG: Add calling convention argument to calling convention funcsMatt Arsenault2018-07-281-96/+113
* [SelectionDAGBuilder] Add masked loads to PendingLoads rather than calling DA...Craig Topper2018-07-261-4/+2
* [DebugInfo] LowerDbgDeclare: Add derefs when handling CallInst usersVedant Kumar2018-07-261-11/+19
* [SelectionDAG] try to convert funnel shift directly to rotate if legalSanjay Patel2018-07-251-1/+10
* Fix PR34170: Crash on inline asm with 64bit output in 32bit GPRThomas Preud'homme2018-07-251-20/+36
* [SelectionDAG] Reduce DanglingDebugInfo memory traffic, NFCVedant Kumar2018-07-231-19/+23
* [SelectionDAGBuilder] Use APInt::isZero instead of comparing APInt::getZExtVa...Craig Topper2018-07-221-1/+1
* [SelectionDAGBuilder] Restrict vector reduction check to types with a power o...Craig Topper2018-07-221-0/+4
* [Intrinsics] define funnel shift IR intrinsics + DAG builder supportSanjay Patel2018-07-161-0/+37
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