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authorCameron McInally <cameron.mcinally@nyu.edu>2018-11-13 18:15:47 +0000
committerCameron McInally <cameron.mcinally@nyu.edu>2018-11-13 18:15:47 +0000
commitcbde0d9c7be1991751dc3eb5928294d2e00ef26a (patch)
treead839084df9863182687fadb95471920cb15381b /llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
parent9d87256d3de67f7a2e8f778ee775e0b6bb309aeb (diff)
downloadbcm5719-llvm-cbde0d9c7be1991751dc3eb5928294d2e00ef26a.tar.gz
bcm5719-llvm-cbde0d9c7be1991751dc3eb5928294d2e00ef26a.zip
[IR] Add a dedicated FNeg IR Instruction
The IEEE-754 Standard makes it clear that fneg(x) and fsub(-0.0, x) are two different operations. The former is a bitwise operation, while the latter is an arithmetic operation. This patch creates a dedicated FNeg IR Instruction to model that behavior. Differential Revision: https://reviews.llvm.org/D53877 llvm-svn: 346774
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp9
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index bf24d7f7562..ebe172548e3 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -2801,6 +2801,15 @@ static bool isVectorReductionOp(const User *I) {
return ReduxExtracted;
}
+void SelectionDAGBuilder::visitUnary(const User &I, unsigned Opcode) {
+ SDNodeFlags Flags;
+
+ SDValue Op = getValue(I.getOperand(0));
+ SDValue UnNodeValue = DAG.getNode(Opcode, getCurSDLoc(), Op.getValueType(),
+ Op, Flags);
+ setValue(&I, UnNodeValue);
+}
+
void SelectionDAGBuilder::visitBinary(const User &I, unsigned Opcode) {
SDNodeFlags Flags;
if (auto *OFBinOp = dyn_cast<OverflowingBinaryOperator>(&I)) {
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