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author | Sanjay Patel <spatel@rotateright.com> | 2018-07-25 21:38:30 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2018-07-25 21:38:30 +0000 |
commit | 215dcbf4db51bde695b993eff984cd605d796d58 (patch) | |
tree | 29f10d5b9e2000355b7ae06b9854d55b831672f5 /llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | |
parent | 4f10a9d3a3a47cd60e5760ba4434a566054d9562 (diff) | |
download | bcm5719-llvm-215dcbf4db51bde695b993eff984cd605d796d58.tar.gz bcm5719-llvm-215dcbf4db51bde695b993eff984cd605d796d58.zip |
[SelectionDAG] try to convert funnel shift directly to rotate if legal
If the DAGCombiner's rotate matching was working as expected,
I don't think we'd see any test diffs here.
This sidesteps the issue of custom lowering for rotates raised in PR38243:
https://bugs.llvm.org/show_bug.cgi?id=38243
...by only dealing with legal operations.
llvm-svn: 337966
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index b9c7a8f5bc3..12ce222075b 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -5672,7 +5672,16 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) { SDValue Z = getValue(I.getArgOperand(2)); EVT VT = X.getValueType(); - // TODO: When X == Y, this is rotate. Create the node directly if legal. + // When X == Y, this is rotate. Create the node directly if legal. + // TODO: This should also be done if the operation is custom, but we have + // to make sure targets are handling the modulo shift amount as expected. + // TODO: If the rotate direction (left or right) corresponding to the shift + // is not available, adjust the shift value and invert the direction. + auto RotateOpcode = IsFSHL ? ISD::ROTL : ISD::ROTR; + if (X == Y && TLI.isOperationLegal(RotateOpcode, VT)) { + setValue(&I, DAG.getNode(RotateOpcode, sdl, VT, X, Z)); + return nullptr; + } // Get the shift amount and inverse shift amount, modulo the bit-width. SDValue BitWidthC = DAG.getConstant(VT.getScalarSizeInBits(), sdl, VT); |