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path: root/llvm/lib/CodeGen/RegAllocSimple.cpp
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* Make dense maps keyed on physical registers smallerusingAlkis Evlogimenos2004-02-151-1/+1
| | | | | | | | | | MRegisterInfo::getNumRegs() instead of MRegisterInfo::FirstVirtualRegister. Also use MRegisterInfo::is{Physical,Virtual}Register where appropriate. llvm-svn: 11477
* Remove getAllocatedRegNum(). Use getReg() instead.Alkis Evlogimenos2004-02-131-4/+4
| | | | llvm-svn: 11393
* Change MachineBasicBlock's vector of MachineInstr pointers into anAlkis Evlogimenos2004-02-121-7/+5
| | | | | | | | | ilist of MachineInstr objects. This allows constant time removal and insertion of MachineInstr instances from anywhere in each MachineBasicBlock. It also allows for constant time splicing of MachineInstrs into or out of MachineBasicBlocks. llvm-svn: 11340
* Do not use MachineOperand::isVirtualRegister either!Chris Lattner2004-02-101-1/+1
| | | | llvm-svn: 11283
* Change interface of MachineOperand as follows:Alkis Evlogimenos2003-12-141-2/+2
| | | | | | | | | | | | | | | a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse() b) add isUse(), isDef() c) rename opHiBits32() to isHiBits32(), opLoBits32() to isLoBits32(), opHiBits64() to isHiBits64(), opLoBits64() to isLoBits64(). This results to much more readable code, for example compare "op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used very often in the code. llvm-svn: 10461
* Put all LLVM code into the llvm namespace, as per bug 109.Brian Gaeke2003-11-111-0/+4
| | | | llvm-svn: 9903
* Added LLVM project notice to the top of every C++ source file.John Criswell2003-10-201-0/+7
| | | | | | Header files will be on the way. llvm-svn: 9298
* Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefsAlkis Evlogimenos2003-10-081-6/+6
| | | | | | | | | | | | | | | | | | | | | and TargetInstrDescriptor::ImplicitUses to always point to a null terminated array and never be null. So there is no need to check for pointer validity when iterating over those sets. Code that looked like: if (const unsigned* AS = TID.ImplicitDefs) { for (int i = 0; AS[i]; ++i) { // use AS[i] } } was changed to: for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) { // use *AS } llvm-svn: 8960
* Spell `necessary' correctly.Misha Brukman2003-08-181-1/+1
| | | | llvm-svn: 7944
* Factory methods for FunctionPasses now return type FunctionPass *.Brian Gaeke2003-08-131-1/+1
| | | | llvm-svn: 7823
* Set debug typesChris Lattner2003-08-031-0/+1
| | | | llvm-svn: 7533
* Move DEBUG to Debug.hChris Lattner2003-08-011-0/+1
| | | | llvm-svn: 7497
* (1) Added special register class containing (for now) %fsr.Vikram S. Adve2003-05-271-1/+1
| | | | | | | | | | | | | Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". llvm-svn: 6341
* Rename MachineInstrInfo -> TargetInstrInfoChris Lattner2003-01-141-2/+2
| | | | llvm-svn: 5272
* * Use the PHI Elimination passChris Lattner2003-01-131-80/+6
| | | | llvm-svn: 5220
* Rename FunctionFrameInfo to MachineFrameInfoChris Lattner2002-12-281-1/+1
| | | | llvm-svn: 5200
* * Convert to be a MachineFunctionPass instanceChris Lattner2002-12-281-174/+67
| | | | | | | | | | | | | | | | | | * Use new FunctionFrameInfo object to manage stack slots instead of doing it directly * Adjust to new MRegisterInfo API * Don't take a TM as a ctor argument * Don't keep track of which callee saved registers are modified * Don't emit prolog/epilog code or spill/restore code for callee saved regs * Use new allocation_order_begin/end iterators to simplify dramatically the logic for picking registers to allocate * Machine PHI nodes can no longer contain constant arguments * Use a bitvector to keep track of registers used instead of a set * Fix problem where explicitly referenced registers would be added to regsused set and never removed llvm-svn: 5196
* Adjustments to work with the simpler spill interfaceChris Lattner2002-12-251-22/+24
| | | | llvm-svn: 5144
* Fix compilation on GCC 2.96Chris Lattner2002-12-231-1/+1
| | | | llvm-svn: 5113
* Implicit defs/uses list may be empty.Chris Lattner2002-12-181-6/+6
| | | | llvm-svn: 5103
* Use new reginfo interfaceChris Lattner2002-12-171-3/+59
| | | | llvm-svn: 5099
* Keep the stack frame aligned.Chris Lattner2002-12-161-0/+4
| | | | llvm-svn: 5081
* Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator.Chris Lattner2002-12-161-28/+2
| | | | | | Remvoe some dead code llvm-svn: 5070
* Some simpliciations to the spill/reload interfaceChris Lattner2002-12-151-25/+21
| | | | llvm-svn: 5067
* Simplify PHI node elimination significantly by doing it as a prepass toChris Lattner2002-12-151-30/+13
| | | | | | register allocation llvm-svn: 5066
* Variety of small or trivial simplifications to the code, completely eliminatedChris Lattner2002-12-151-92/+68
| | | | | | the dependence on PhysRegClassMap llvm-svn: 5064
* Remove unused savePhysRegToStack methodChris Lattner2002-12-151-28/+4
| | | | llvm-svn: 5061
* Localize a map, remove anotherChris Lattner2002-12-151-9/+3
| | | | llvm-svn: 5060
* Give simple reg allocator a nice Pass NameChris Lattner2002-12-151-1/+5
| | | | llvm-svn: 5058
* Add a big assert making sure 2 address instructions are formed rightChris Lattner2002-12-151-0/+6
| | | | llvm-svn: 5057
* Fix a problem that occurs when PHI nodes have multiple entries for the same ↵Chris Lattner2002-12-151-30/+47
| | | | | | predecessor llvm-svn: 5055
* Grab bag of minor cleanups. Export some statistics about the number ofChris Lattner2002-12-151-46/+56
| | | | | | spills and reloads emitted llvm-svn: 5054
* Simplify interfaces used by regalloc to insert codeChris Lattner2002-12-151-9/+6
| | | | llvm-svn: 5052
* * Simplify code a bit by breaking the PHI node handling stuff out into a ↵Chris Lattner2002-12-151-152/+161
| | | | | | | | | | seperate function from normal regalloc code * Make the regalloc for a block a function instead of part of runOnMachineBB, which makes it easier to see what's going on in runOnMBB. llvm-svn: 5051
* * Remove some unneccesary instance variablesChris Lattner2002-12-151-19/+16
| | | | | | * Make allocateStackSpaceFor only allocate the right amount of space llvm-svn: 5048
* pull inverse reg class mapping into a class that is sharable and out of theChris Lattner2002-12-151-6/+28
| | | | | | target register description classes. llvm-svn: 5045
* Prune #includesChris Lattner2002-12-151-8/+2
| | | | llvm-svn: 5044
* Remove extraneous #includes, perform FIXMEChris Lattner2002-12-151-10/+6
| | | | llvm-svn: 5043
* Fix borkness with not using MachineBasicBlocks in PHI nodesChris Lattner2002-12-151-12/+1
| | | | llvm-svn: 5035
* Fixed a bug where moves due to phis were being neglected.Misha Brukman2002-12-131-23/+19
| | | | llvm-svn: 5019
* Need to insert all moves due to PHI nodes before *ALL* jumps in a predecessorMisha Brukman2002-12-131-15/+10
| | | | | | basic block, as there could be multiple. llvm-svn: 5016
* This should be more correct: invalidates physical registers that are used inMisha Brukman2002-12-131-4/+41
| | | | | | an instruction to avoid using them to allocate to other virtual registers. llvm-svn: 5013
* Fixed bug with running out of registers. Also, reinstated namespace whichMisha Brukman2002-12-131-2/+5
| | | | | | disappeared during the last checkin. llvm-svn: 5007
* This should handle register allocating PHI nodes.Misha Brukman2002-12-131-23/+97
| | | | llvm-svn: 5002
* Start allocating stack space at [ebp-4] to not overwrite the return address.Misha Brukman2002-12-131-2/+9
| | | | | | Also make all loads & stores 4-byte aligned for performance. ;) llvm-svn: 4982
* Take advantage of our knowledge of 2-address X86 instructions andMisha Brukman2002-12-121-7/+24
| | | | | | register-allocated them appropriately. llvm-svn: 4976
* Added code generation for function prologues and epilogues.Misha Brukman2002-12-041-17/+32
| | | | llvm-svn: 4930
* Fun arithmetic with iterators aimed at fixing a bug: inserting instructionsMisha Brukman2002-12-041-2/+4
| | | | | | | after the *current* instruction while keeping the iterator in the same 'logical' place. llvm-svn: 4923
* This should fix the bug seen with some registers not being allocatedMisha Brukman2002-12-031-6/+45
| | | | | | | | | | | correctly: skipping instructions by incorrectly incrementing the pointer. Also adds support for building a reg-to-regclass map, and splits the function for saving register to stack into two, one suitable for virtual registers (which also assigns it a physical register) and one for simply storing back physical registers. llvm-svn: 4898
* * Abstracted out stack space allocation into its own functionMisha Brukman2002-12-021-34/+36
| | | | | | * Added saving of register values to the stack llvm-svn: 4858
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