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* Final polish on machine pass registries.Jim Laskey2006-08-021-1/+1
| | | | llvm-svn: 29471
* Introducing plugable register allocators and instruction schedulers.Jim Laskey2006-08-011-0/+5
| | | | llvm-svn: 29434
* Eliminate data relocations by using NULL instead of global empty list.Jim Laskey2006-07-211-5/+9
| | | | llvm-svn: 29250
* Reduce number of exported symbolsAndrew Lenharth2006-07-201-2/+2
| | | | llvm-svn: 29220
* Shave another 27K off libllvmgcc.dylib with visibility hiddenChris Lattner2006-06-281-1/+2
| | | | llvm-svn: 28973
* Move some methods out of MachineInstr into MachineOperandChris Lattner2006-05-041-1/+1
| | | | llvm-svn: 28102
* Add explicit #includes of <iostream>Chris Lattner2006-01-221-0/+1
| | | | llvm-svn: 25515
* Change this code ot pass register classes into the stack slot spiller/reloaderChris Lattner2005-09-301-2/+2
| | | | | | | code. PrologEpilogInserter hasn't been updated yet though, so targets cannot use this info. llvm-svn: 23536
* Convert tabs to spacesMisha Brukman2005-04-221-1/+1
| | | | llvm-svn: 21439
* Remove trailing whitespaceMisha Brukman2005-04-211-12/+12
| | | | llvm-svn: 21420
* Update physregsused info.Chris Lattner2005-01-231-10/+18
| | | | llvm-svn: 19793
* Changes For Bug 352Reid Spencer2004-09-011-3/+3
| | | | | | | | Move include/Config and include/Support into include/llvm/Config, include/llvm/ADT and include/llvm/Support. From here on out, all LLVM public header files must be under include/llvm/. llvm-svn: 16137
* Stop using CreateStackObject(RegClass*)Chris Lattner2004-08-151-1/+2
| | | | llvm-svn: 15775
* These methods no longer take a TargetRegisterClass* operand.Chris Lattner2004-08-151-2/+2
| | | | llvm-svn: 15774
* These files don't need to include <iostream> since they include ↵Brian Gaeke2004-07-211-1/+0
| | | | | | "Support/Debug.h". llvm-svn: 15089
* Made a fix so that you can print out MachineInstrs that belong to a ↵Tanya Lattner2004-06-251-1/+1
| | | | | | MachineBasicBlock that is not yet attached to a MachineFunction. This change includes changing the third operand (TargetMachine) to a pointer for the MachineInstr::print function. llvm-svn: 14389
* Adjust to new TargetMachine interfaceChris Lattner2004-06-021-2/+2
| | | | llvm-svn: 13956
* Fix PR294Chris Lattner2004-03-161-1/+2
| | | | llvm-svn: 12425
* Simplify iterator usage now that we have next(). Also don't pass iterators ↵Alkis Evlogimenos2004-02-231-11/+7
| | | | | | by reference now that MachineInstr* are in an ilist llvm-svn: 11732
* Rename reloads/spills to loads/stores.Alkis Evlogimenos2004-02-191-4/+4
| | | | llvm-svn: 11619
* Finegrainify namespacificationChris Lattner2004-02-151-8/+12
| | | | | | Remove one of the operands of a two operand instruction llvm-svn: 11478
* Make dense maps keyed on physical registers smallerusingAlkis Evlogimenos2004-02-151-1/+1
| | | | | | | | | | MRegisterInfo::getNumRegs() instead of MRegisterInfo::FirstVirtualRegister. Also use MRegisterInfo::is{Physical,Virtual}Register where appropriate. llvm-svn: 11477
* Remove getAllocatedRegNum(). Use getReg() instead.Alkis Evlogimenos2004-02-131-4/+4
| | | | llvm-svn: 11393
* Change MachineBasicBlock's vector of MachineInstr pointers into anAlkis Evlogimenos2004-02-121-7/+5
| | | | | | | | | ilist of MachineInstr objects. This allows constant time removal and insertion of MachineInstr instances from anywhere in each MachineBasicBlock. It also allows for constant time splicing of MachineInstrs into or out of MachineBasicBlocks. llvm-svn: 11340
* Do not use MachineOperand::isVirtualRegister either!Chris Lattner2004-02-101-1/+1
| | | | llvm-svn: 11283
* Change interface of MachineOperand as follows:Alkis Evlogimenos2003-12-141-2/+2
| | | | | | | | | | | | | | | a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse() b) add isUse(), isDef() c) rename opHiBits32() to isHiBits32(), opLoBits32() to isLoBits32(), opHiBits64() to isHiBits64(), opLoBits64() to isLoBits64(). This results to much more readable code, for example compare "op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used very often in the code. llvm-svn: 10461
* Put all LLVM code into the llvm namespace, as per bug 109.Brian Gaeke2003-11-111-0/+4
| | | | llvm-svn: 9903
* Added LLVM project notice to the top of every C++ source file.John Criswell2003-10-201-0/+7
| | | | | | Header files will be on the way. llvm-svn: 9298
* Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefsAlkis Evlogimenos2003-10-081-6/+6
| | | | | | | | | | | | | | | | | | | | | and TargetInstrDescriptor::ImplicitUses to always point to a null terminated array and never be null. So there is no need to check for pointer validity when iterating over those sets. Code that looked like: if (const unsigned* AS = TID.ImplicitDefs) { for (int i = 0; AS[i]; ++i) { // use AS[i] } } was changed to: for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) { // use *AS } llvm-svn: 8960
* Spell `necessary' correctly.Misha Brukman2003-08-181-1/+1
| | | | llvm-svn: 7944
* Factory methods for FunctionPasses now return type FunctionPass *.Brian Gaeke2003-08-131-1/+1
| | | | llvm-svn: 7823
* Set debug typesChris Lattner2003-08-031-0/+1
| | | | llvm-svn: 7533
* Move DEBUG to Debug.hChris Lattner2003-08-011-0/+1
| | | | llvm-svn: 7497
* (1) Added special register class containing (for now) %fsr.Vikram S. Adve2003-05-271-1/+1
| | | | | | | | | | | | | Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". llvm-svn: 6341
* Rename MachineInstrInfo -> TargetInstrInfoChris Lattner2003-01-141-2/+2
| | | | llvm-svn: 5272
* * Use the PHI Elimination passChris Lattner2003-01-131-80/+6
| | | | llvm-svn: 5220
* Rename FunctionFrameInfo to MachineFrameInfoChris Lattner2002-12-281-1/+1
| | | | llvm-svn: 5200
* * Convert to be a MachineFunctionPass instanceChris Lattner2002-12-281-174/+67
| | | | | | | | | | | | | | | | | | * Use new FunctionFrameInfo object to manage stack slots instead of doing it directly * Adjust to new MRegisterInfo API * Don't take a TM as a ctor argument * Don't keep track of which callee saved registers are modified * Don't emit prolog/epilog code or spill/restore code for callee saved regs * Use new allocation_order_begin/end iterators to simplify dramatically the logic for picking registers to allocate * Machine PHI nodes can no longer contain constant arguments * Use a bitvector to keep track of registers used instead of a set * Fix problem where explicitly referenced registers would be added to regsused set and never removed llvm-svn: 5196
* Adjustments to work with the simpler spill interfaceChris Lattner2002-12-251-22/+24
| | | | llvm-svn: 5144
* Fix compilation on GCC 2.96Chris Lattner2002-12-231-1/+1
| | | | llvm-svn: 5113
* Implicit defs/uses list may be empty.Chris Lattner2002-12-181-6/+6
| | | | llvm-svn: 5103
* Use new reginfo interfaceChris Lattner2002-12-171-3/+59
| | | | llvm-svn: 5099
* Keep the stack frame aligned.Chris Lattner2002-12-161-0/+4
| | | | llvm-svn: 5081
* Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator.Chris Lattner2002-12-161-28/+2
| | | | | | Remvoe some dead code llvm-svn: 5070
* Some simpliciations to the spill/reload interfaceChris Lattner2002-12-151-25/+21
| | | | llvm-svn: 5067
* Simplify PHI node elimination significantly by doing it as a prepass toChris Lattner2002-12-151-30/+13
| | | | | | register allocation llvm-svn: 5066
* Variety of small or trivial simplifications to the code, completely eliminatedChris Lattner2002-12-151-92/+68
| | | | | | the dependence on PhysRegClassMap llvm-svn: 5064
* Remove unused savePhysRegToStack methodChris Lattner2002-12-151-28/+4
| | | | llvm-svn: 5061
* Localize a map, remove anotherChris Lattner2002-12-151-9/+3
| | | | llvm-svn: 5060
* Give simple reg allocator a nice Pass NameChris Lattner2002-12-151-1/+5
| | | | llvm-svn: 5058
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