diff options
| author | Chris Lattner <sabre@nondot.org> | 2004-06-02 05:57:12 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2004-06-02 05:57:12 +0000 |
| commit | 2150542af9c47a6c6614ec5900f7eb021211d8b5 (patch) | |
| tree | 3b30ef91418e526cf08e4ccd73bd98dffc29b926 /llvm/lib/CodeGen/RegAllocSimple.cpp | |
| parent | 185fa54c689ab5bb8f97ee776def598ccfa74566 (diff) | |
| download | bcm5719-llvm-2150542af9c47a6c6614ec5900f7eb021211d8b5.tar.gz bcm5719-llvm-2150542af9c47a6c6614ec5900f7eb021211d8b5.zip | |
Adjust to new TargetMachine interface
llvm-svn: 13956
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocSimple.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocSimple.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/RegAllocSimple.cpp b/llvm/lib/CodeGen/RegAllocSimple.cpp index 1b7f5471b42..4e825b233e3 100644 --- a/llvm/lib/CodeGen/RegAllocSimple.cpp +++ b/llvm/lib/CodeGen/RegAllocSimple.cpp @@ -159,7 +159,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) { // a preliminary pass that will invalidate any registers that // are used by the instruction (including implicit uses) unsigned Opcode = MI->getOpcode(); - const TargetInstrDescriptor &Desc = TM->getInstrInfo().get(Opcode); + const TargetInstrDescriptor &Desc = TM->getInstrInfo()->get(Opcode); const unsigned *Regs = Desc.ImplicitUses; while (*Regs) RegsUsed[*Regs++] = true; @@ -184,7 +184,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) { unsigned physReg = Virt2PhysRegMap[virtualReg]; if (physReg == 0) { if (op.isDef()) { - if (!TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) || i) { + if (!TM->getInstrInfo()->isTwoAddrInstr(MI->getOpcode()) || i) { physReg = getFreeReg(virtualReg); } else { // must be same register number as the first operand |
