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path: root/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
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* GlobalISel: support translation of extractvalue instructions.Tim Northover2016-08-191-1/+1
| | | | llvm-svn: 279285
* GlobalISel: support overflow arithmetic intrinsics.Tim Northover2016-08-191-9/+15
| | | | | | | | | | | | Unsigned addition and subtraction can reuse the instructions created to legalize large width operations (i.e. both produce and consume a carry flag). Signed operations and multiplies get a dedicated op-with-overflow instruction. Once this is produced the two values are combined into a struct register (which will almost always be merged with a corresponding G_EXTRACT as part of legalization). llvm-svn: 279278
* GlobalISel: support irtranslation of icmp instructions.Tim Northover2016-08-171-0/+11
| | | | llvm-svn: 278969
* GlobalISel: implement narrowing for G_ADD.Tim Northover2016-08-041-0/+17
| | | | llvm-svn: 277769
* GlobalISel: add code to widen scalar G_ADDTim Northover2016-08-041-0/+10
| | | | llvm-svn: 277747
* GlobalISel: support translation of intrinsic calls.Tim Northover2016-07-291-0/+14
| | | | | | | | These come in two variants for now: G_INTRINSIC and G_INTRINSIC_W_SIDE_EFFECTS. We may decide to split the latter up with finer-grained restrictions later, if necessary. llvm-svn: 277224
* GlobalISel: add generic conditional branch.Tim Northover2016-07-291-1/+7
| | | | | | | Just the basic equivalent to DAG's condbr for now, we'll get to things like br_cc when we start doing more legalization. llvm-svn: 277184
* CodeGen: improve MachineInstrBuilder & MachineIRBuilder interfaceTim Northover2016-07-291-47/+47
| | | | | | | | | | | | | | For MachineInstrBuilder, having to manually use RegState::Define is ugly and makes register definitions clunkier than they need to be, so this adds two convenience functions: addDef and addUse. For MachineIRBuilder, we want to avoid BuildMI's first-reg-is-def rule because it's hidden away and causes bugs. So this patch switches buildInstr to returning a MachineInstrBuilder and adding *all* operands via addDef/addUse. NFC. llvm-svn: 277176
* GlobalISel: add generic load and store instructions.Tim Northover2016-07-261-0/+17
| | | | | | | Pretty straightforward, the only oddity is the MachineMemOperand (which it's surprisingly difficult to share code for). llvm-svn: 276799
* GlobalISel: add correct operand type to G_FRAME_INDEX instrs.Tim Northover2016-07-261-1/+1
| | | | | | Frame indices should use "addFrameIndex", not "addImm". llvm-svn: 276775
* GlobalISel: add specialized buildCopy function to MachineInstrBuilder.Tim Northover2016-07-261-0/+4
| | | | | | NFC. llvm-svn: 276763
* GlobalISel: give MachineInstrBuilder a uniform interface. NFC.Tim Northover2016-07-261-49/+11
| | | | | | | | | | | Instead of an ad-hoc collection of "buildInstr" functions with varying numbers of registers, this uses variadic templates to provide for as many regs as needed! Also make IRtranslator use new "buildBr" function instead of some weird generic one that no-one else would really use. llvm-svn: 276762
* GlobalISel: add generic casts to IRTranslatorTim Northover2016-07-251-0/+12
| | | | | | | | | This adds LLVM's 3 main cast instructions (inttoptr, ptrtoint, bitcast) to the IRTranslator. The first two are direct translations (with 2 MachineInstr types each). Since LLT discards information, a bitcast might become trivial and we emit a COPY in those cases instead. llvm-svn: 276690
* GlobalISel: implement legalization pass, with just one transformation.Tim Northover2016-07-221-0/+32
| | | | | | | | | This adds the actual MachineLegalizeHelper to do the work and a trivial pass wrapper that legalizes all instructions in a MachineFunction. Currently the only transformation supported is splitting up a vector G_ADD into one acting on smaller vectors. llvm-svn: 276461
* GlobalISel: implement alloca instructionTim Northover2016-07-221-0/+8
| | | | llvm-svn: 276433
* GlobalISel: implement low-level type with just size & vector lanes.Tim Northover2016-07-201-7/+7
| | | | | | | | This should be all the low-level instruction selection needs to determine how to implement an operation, with the remaining context taken from the opcode (e.g. G_ADD vs G_FADD) or other flags not based on type (e.g. fast-math). llvm-svn: 276158
* [IRTranslator] Translate unconditional branches.Quentin Colombet2016-03-111-0/+7
| | | | llvm-svn: 263265
* [MachineIRBuilder] Rework buildInstr API to maximize code reuse.Quentin Colombet2016-03-111-22/+24
| | | | llvm-svn: 263264
* [MachineIRBuilder] Rename the setter of MF for consistency with the getter.Quentin Colombet2016-03-111-1/+1
| | | | llvm-svn: 263262
* [MachineIRBuilder] Rename the setter for MBB for consistency with the getter.Quentin Colombet2016-03-111-2/+2
| | | | llvm-svn: 263261
* [Target] Add a helper function to check if an opcode is invalid after isel.Quentin Colombet2016-02-111-1/+13
| | | | llvm-svn: 260590
* [GlobalISel] Teach the IRTranslator how to lower returns.Quentin Colombet2016-02-111-0/+22
| | | | llvm-svn: 260562
* [GlobalISel] Add a MachineIRBuilder class.Quentin Colombet2016-02-111-0/+61
Helper class to build machine instrs. This is a higher abstraction than MachineInstrBuilder. llvm-svn: 260547
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