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* Remove/modify C backend references from LLVM documentation.David Blaikie2012-06-141-1/+2
| | | | | | Patch by Wei-Ren Chen. llvm-svn: 158456
* Remove the old register list functions from MCRegisterInfo.Jakob Stoklund Olesen2012-06-011-3/+3
| | | | | | | | | | These functions exposed the layout of the underlying data tables as null-terminated uint16_t arrays. Use the new MCSubRegIterator, MCSuperRegIterator, and MCRegAliasIterator classes instead. llvm-svn: 157855
* [docs] Update HTML pages to refer to CSS in a way that works locally and ↵Daniel Dunbar2012-04-191-1/+1
| | | | | | with Sphinx. llvm-svn: 155153
* Fix class name.Jakub Staszak2012-04-151-1/+1
| | | | llvm-svn: 154773
* Fix filename and register numbers.Jakub Staszak2012-04-151-3/+3
| | | | llvm-svn: 154771
* llvm/docs/*.html: Fix markups.NAKAMURA Takumi2012-03-271-0/+2
| | | | llvm-svn: 153508
* Add a new kind of MachineOperand: MO_RegisterMask.Jakob Stoklund Olesen2012-01-161-0/+15
| | | | | | | | | | | | | | | | | | | | | Register masks will be used as a compact representation of large clobber lists. Currently, an x86 call instruction has some 40 operands representing call-clobbered registers. That's more than 1kB of useless operands per call site. A register mask operand references a bit mask of call-preserved registers, everything else is clobbered. The bit mask will typically come from TargetRegisterInfo::getCallPreservedMask(). By abandoning ImplicitDefs for call-clobbered registers, it also becomes possible to share call instruction descriptions between calling conventions, and we can get rid of the WINCALL* instructions. This patch introduces the new operand kind. Future patches will add RegMask support to target-independent passes before finally the fixed clobber lists can be removed from call instruction descriptions. llvm-svn: 148250
* Adding a Hexagon cell for segmented stacks, as they have been implemented ↵Joe Abbey2012-01-161-0/+1
| | | | | | | | for X86 and not Sparc... Committed as obvious llvm-svn: 148237
* Add high level description of MachineInstr bundles.Evan Cheng2011-12-141-0/+83
| | | | llvm-svn: 146589
* Hexagon backend supportTony Linthicum2011-12-121-0/+8
| | | | llvm-svn: 146412
* Add documentation for machine-independent DFA packetizerAnshuman Dasgupta2011-12-061-0/+75
| | | | llvm-svn: 145988
* grammar.Rafael Espindola2011-11-291-1/+1
| | | | llvm-svn: 145423
* Fix spelling/grammar errors found by Duncan.Rafael Espindola2011-11-281-2/+2
| | | | llvm-svn: 145250
* Add a description of the status of segmented stacks.Rafael Espindola2011-11-271-0/+30
| | | | llvm-svn: 145201
* docs/*.html: Fix markups.NAKAMURA Takumi2011-10-311-0/+4
| | | | llvm-svn: 143349
* Remove the Alpha backend.Dan Gohman2011-10-271-8/+0
| | | | llvm-svn: 143164
* According to Mips folks, the backend is now generally reliable (they canBruno Cardoso Lopes2011-10-251-2/+2
| | | | | | | | compile and use a bunch of stuff using o32 abi). Also the rt-rk.com team claims that the JIT support they contributed, is complete for the mips "static" relocation model. llvm-svn: 142950
* Remove the Blackfin backend.Dan Gohman2011-10-251-8/+0
| | | | llvm-svn: 142880
* Remove the SystemZ backend.Dan Gohman2011-10-241-8/+0
| | | | llvm-svn: 142878
* X86 has asterisk-free inline asm support now.Jakob Stoklund Olesen2011-09-191-4/+1
| | | | | | Floating point stack inline asm works. llvm-svn: 140033
* PTX: Add basic documentation to CodeGenerator.htmlJustin Holewinski2011-08-111-0/+65
| | | | llvm-svn: 137315
* Fix a typo.Roman Divacky2011-08-011-1/+1
| | | | llvm-svn: 136646
* Updating stale documentation on regalloc modes.Andrew Trick2011-07-261-7/+13
| | | | llvm-svn: 136112
* Describe the reasoning for compact unwind in better terms. Thanks to Nick ↵Bill Wendling2011-07-261-19/+23
| | | | | | Kledzik for the description. llvm-svn: 136064
* Fix some typos.Bill Wendling2011-07-251-4/+6
| | | | llvm-svn: 135956
* An initial description of the compact unwind encoding.Bill Wendling2011-07-251-1/+109
| | | | llvm-svn: 135955
* document thiscall, PR9101Chris Lattner2011-05-221-5/+8
| | | | llvm-svn: 131873
* Document the automatic alias printing of InstAliases.Bill Wendling2011-05-041-0/+5
| | | | llvm-svn: 130889
* docs: Introduce cascading style <div> and <p> continued on <h[2-5]>.NAKAMURA Takumi2011-04-231-115/+102
| | | | | | | | | | | | | | | | | <h2>Section Example</h2> <div> <!-- h2+div is applied --> <p>Section preamble.</p> <h3>Subsection Example</h3> <p> <!-- h3+p is applied --> Subsection body </p> <!-- End of section body --> </div> FIXME: Care H5 better. llvm-svn: 130040
* docs: Use <Hn> as Heading elements instead of <DIV class="doc_foo">.NAKAMURA Takumi2011-04-181-151/+152
| | | | | | | | | H1 ... doc_title H2 ... doc_section H3 ... doc_subsection H4 ... doc_subsubsection llvm-svn: 129736
* Fix typo.Jay Foad2011-04-131-1/+1
| | | | llvm-svn: 129437
* docs: Canonicalize URLs.NAKAMURA Takumi2011-04-091-1/+1
| | | | llvm-svn: 129181
* Trivial typo fixes.Jay Foad2011-04-061-1/+1
| | | | llvm-svn: 128996
* Finish up the first draft of the release notes.Chris Lattner2011-04-061-1/+1
| | | | | | improvements are welcome, please commit any changes directly to SVN. llvm-svn: 128992
* Don't document exactly how virtual registers are represented as integers. CodeJakob Stoklund Olesen2011-01-081-11/+18
| | | | | | | | | shouldn't depend directly on that. Give an example of how to iterate over all virtual registers in a function without depending on the representation. llvm-svn: 123099
* Update the target feature matrix to reflect some new features in the MBlaze ↵Wesley Peck2010-12-201-4/+4
| | | | | | backend. llvm-svn: 122276
* Update the Target Feature Matrix for MipsBruno Cardoso Lopes2010-12-191-4/+4
| | | | llvm-svn: 122203
* further fixes.Chris Lattner2010-12-131-2/+2
| | | | llvm-svn: 121657
* fix typoChris Lattner2010-12-121-1/+1
| | | | llvm-svn: 121620
* no alpha jit support.Chris Lattner2010-11-141-1/+1
| | | | llvm-svn: 119052
* add (and document) the ability for alias results to haveChris Lattner2010-11-061-2/+10
| | | | | | | | fixed physical registers. Start moving fp comparison aliases to the .td file (which default to using %st1 if nothing is specified). llvm-svn: 118352
* generalize alias support to allow the result of an alias toChris Lattner2010-11-061-1/+9
| | | | | | | add fixed immediate values. Move the aad and aam aliases to use this, and document it. llvm-svn: 118350
* document instalias.Chris Lattner2010-11-061-0/+49
| | | | llvm-svn: 118335
* Validate HTML.Benjamin Kramer2010-10-301-13/+13
| | | | llvm-svn: 117847
* add missing tagChris Lattner2010-10-301-0/+2
| | | | llvm-svn: 117846
* fix typos and some serious bugs in feature handling (but not forChris Lattner2010-10-301-1/+1
| | | | | | | cases that are currently exercised). Thanks to Frits van Bommel for the great review! llvm-svn: 117840
* Implement (and document!) support for MnemonicAlias's to have Requires Chris Lattner2010-10-301-3/+15
| | | | | | | | | | | directives, allowing things like this: def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>; def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>; Move the rest of the X86 MnemonicAliases over to the .td file. llvm-svn: 117830
* implement (and document!) the first kind of MC assembler alias, which Chris Lattner2010-10-301-3/+52
| | | | | | | just remaps one mnemonic to another. Convert a few of the X86 aliases from .cpp to .td code. llvm-svn: 117815
* clarify that not having the ".o file writing" featureChris Lattner2010-10-281-0/+4
| | | | | | | doesn't mean that you can't get a .o file. Apparently this is confusing :) llvm-svn: 117523
* Update target feature matrix for CellSPUKalle Raiskila2010-10-251-4/+4
| | | | llvm-svn: 117255
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