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| author | Chris Lattner <sabre@nondot.org> | 2010-11-06 19:25:43 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-11-06 19:25:43 +0000 |
| commit | b6f8e8248d7f3540f739f696ec73534f7d9fcaf4 (patch) | |
| tree | 2c801fdc13fe78886e5921f460e387914f125bd5 /llvm/docs/CodeGenerator.html | |
| parent | 161bf7de25c6505917741ee32a0a2aad2099bd1d (diff) | |
| download | bcm5719-llvm-b6f8e8248d7f3540f739f696ec73534f7d9fcaf4.tar.gz bcm5719-llvm-b6f8e8248d7f3540f739f696ec73534f7d9fcaf4.zip | |
generalize alias support to allow the result of an alias to
add fixed immediate values. Move the aad and aam aliases to
use this, and document it.
llvm-svn: 118350
Diffstat (limited to 'llvm/docs/CodeGenerator.html')
| -rw-r--r-- | llvm/docs/CodeGenerator.html | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/llvm/docs/CodeGenerator.html b/llvm/docs/CodeGenerator.html index d4e932a969f..376b91c8f1a 100644 --- a/llvm/docs/CodeGenerator.html +++ b/llvm/docs/CodeGenerator.html @@ -1998,7 +1998,15 @@ def : InstAlias<"clrq $reg", (XOR64rr GR64:$reg, GR64:$reg)>; <p>This example also shows that tied operands are only listed once. In the X86 backend, XOR8rr has two input GR8's and one output GR8 (where an input is tied to the output). InstAliases take a flattened operand list without duplicates -for tied operands.</p> +for tied operands. The result of an instruction alias can also use immediates, +which are added as simple immediate operands in the result, for example:</p> + +<div class="doc_code"> +<pre> +def : InstAlias<"aad", (AAD8i8 10)>; +</pre> +</div> + <p>Instruction aliases can also have a Requires clause to make them subtarget specific.</p> |
