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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-06-01 23:28:34 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-06-01 23:28:34 +0000
commit83b0ac498a354790ffb81b8fc54756a167fc0bff (patch)
tree1ef208cf237e847bb855675186b5a4c164bb0789 /llvm/docs/CodeGenerator.html
parent54038d796c806abb9570a9f9be689ae2380968cf (diff)
downloadbcm5719-llvm-83b0ac498a354790ffb81b8fc54756a167fc0bff.tar.gz
bcm5719-llvm-83b0ac498a354790ffb81b8fc54756a167fc0bff.zip
Remove the old register list functions from MCRegisterInfo.
These functions exposed the layout of the underlying data tables as null-terminated uint16_t arrays. Use the new MCSubRegIterator, MCSuperRegIterator, and MCRegAliasIterator classes instead. llvm-svn: 157855
Diffstat (limited to 'llvm/docs/CodeGenerator.html')
-rw-r--r--llvm/docs/CodeGenerator.html6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/docs/CodeGenerator.html b/llvm/docs/CodeGenerator.html
index 2829a94d4bb..672dc294a75 100644
--- a/llvm/docs/CodeGenerator.html
+++ b/llvm/docs/CodeGenerator.html
@@ -1626,9 +1626,9 @@ def : Pat&lt;(i32 imm:$imm),
the registers <tt>EAX</tt>, <tt>AX</tt> and <tt>AL</tt> share the first eight
bits. These physical registers are marked as <i>aliased</i> in LLVM. Given a
particular architecture, you can check which registers are aliased by
- inspecting its <tt>RegisterInfo.td</tt> file. Moreover, the method
- <tt>MCRegisterInfo::getAliasSet(p_reg)</tt> returns an array containing
- all the physical registers aliased to the register <tt>p_reg</tt>.</p>
+ inspecting its <tt>RegisterInfo.td</tt> file. Moreover, the class
+ <tt>MCRegAliasIterator</tt> enumerates all the physical registers aliased to
+ a register.</p>
<p>Physical registers, in LLVM, are grouped in <i>Register Classes</i>.
Elements in the same register class are functionally equivalent, and can be
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