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* Range'ify some for loops over RecordDecl::fields()Hans Wennborg2014-08-211-8/+7
| | | | | | No functionality change. llvm-svn: 216183
* Delete support for AuroraUX.Rafael Espindola2014-08-141-1/+0
| | | | | | auroraux.org is not resolving. llvm-svn: 215644
* Revert r214497: [mips] Defer va_arg expansion to the backend.Daniel Sanders2014-08-011-1/+33
| | | | | | | | It appears that the backend does not handle all cases that were handled by clang. In particular, it does not handle structs as used in SingleSource/UnitTests/2003-05-07-VarArgs. llvm-svn: 214512
* [mips] Defer va_arg expansion to the backend.Daniel Sanders2014-08-011-33/+1
| | | | | | | | | | | | | | | | | | | | | | | Summary: This patch causes clang to emit va_arg instructions to the backend instead of expanding them into an implementation itself. The backend already implements va_arg since this is necessary for NaCl so this patch is removing redundant code. Together with the llvm patch (D4556) that accounts for the effect of endianness on the expansion of va_arg, this fixes PR19612. Depends on D4556 Reviewers: sstankovic, dsanders Reviewed By: dsanders Subscribers: rnk, cfe-commits Differential Revision: http://reviews.llvm.org/D4742 llvm-svn: 214497
* [PowerPC] Support ELFv1/ELFv2 ABI selection via -mabi= optionUlrich Weigand2014-07-281-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While Clang now supports both ELFv1 and ELFv2 ABIs, their use is currently hard-coded via the target triple: powerpc64-linux is always ELFv1, while powerpc64le-linux is always ELFv2. These are of course the most common scenarios, but in principle it is possible to support the ELFv2 ABI on big-endian or the ELFv1 ABI on little-endian systems (and GCC does support that), and there are some special use cases for that (e.g. certain Linux kernel versions could only be built using ELFv1 on LE). This patch implements the Clang side of supporting this, based on the LLVM commit 214072. The command line options -mabi=elfv1 or -mabi=elfv2 select the desired ABI if present. (If not, Clang uses the same default rules as now.) Specifically, the patch implements the following changes based on the presence of the -mabi= option: In the driver: - Pass the appropiate -target-abi flag to the back-end - Select the correct dynamic loader version (/lib64/ld64.so.[12]) In the preprocessor: - Define _CALL_ELF to the appropriate value (1 or 2) In the compiler back-end: - Select the correct ABI in TargetInfo.cpp - Select the desired ABI for LLVM via feature (elfv1/elfv2) llvm-svn: 214074
* MS ABI: Ensure 'this' is first for byval+sret methodsReid Kleckner2014-07-261-21/+34
| | | | | | | | | Previously we were building up the inalloca struct in the usual pattern of return type followed by arguments. However, on Windows, 'this' always precedes the 'sret' parameter, so we need to insert it into the struct first as a special case. llvm-svn: 213990
* AArch64: update Clang for merged arm64/aarch64 triples.Tim Northover2014-07-231-3/+1
| | | | | | | | | | | | | | The main subtlety here is that the Darwin tools still need to be given "-arch arm64" rather than "-arch aarch64". Fortunately this already goes via a custom function to handle weird edge-cases in other architectures, and it tested. I removed a few arm64_be tests because that really isn't an interesting thing to worry about. No-one using big-endian is also referring to the target as arm64 (at least as far as toolchains go). Mostly they date from when arm64 was a separate target and we *did* need a parallel name simply to test it at all. Now aarch64_be is sufficient. llvm-svn: 213744
* [PowerPC] Optimize passing certain aggregates by valueUlrich Weigand2014-07-211-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | In addition to enabling ELFv2 homogeneous aggregate handling, LLVM support to pass array types directly also enables a performance enhancement. We can now pass (non-homogeneous) aggregates that fit fully in registers as direct integer arrays, using an element type to encode the alignment requirement (that would otherwise go to the "byval align" field). This is preferable since "byval" forces the back-end to write the aggregate out to the stack, even if it could be passed fully in registers. This is particularly annoying on ELFv2, if there is no parameter save area available, since we then need to allocate space on the callee's stack just to hold those aggregates. Note that to implement this optimization, this patch does not attempt to fully anticipate register allocation rules as (defined in the ABI and) implemented in the back-end. Instead, the patch is simply passing *any* aggregate passed by value using the array mechanism if its size is up to 64 bytes. This means that some of those will end up being passed in stack slots anyway, but the generated code shouldn't be any worse either. (*Large* aggregates remain passed using "byval" to enable optimized copying via memcpy etc.) llvm-svn: 213495
* [PowerPC] Support the ELFv2 ABIUlrich Weigand2014-07-211-9/+169
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements clang support for the PowerPC ELFv2 ABI. Together with a series of companion patches in LLVM, this makes clang/LLVM fully usable on powerpc64le-linux. Most of the ELFv2 ABI changes are fully implemented on the LLVM side. On the clang side, we only need to implement some changes in how aggregate types are passed by value. Specifically, we need to: - pass (and return) "homogeneous" floating-point or vector aggregates in FPRs and VRs (this is similar to the ARM homogeneous aggregate ABI) - return aggregates of up to 16 bytes in one or two GPRs The second piece is trivial to implement in any case. To implement the first piece, this patch makes use of infrastructure recently enabled in the LLVM PowerPC back-end to support passing array types directly, where the array element type encodes properties needed to handle homogeneous aggregates correctly. Specifically, the array element type encodes: - whether the parameter should be passed in FPRs, VRs, or just GPRs/stack slots (for float / vector / integer element types, respectively) - what the alignment requirements of the parameter are when passed in GPRs/stack slots (8 for float / 16 for vector / the element type size for integer element types) -- this corresponds to the "byval align" field With this support in place, the clang part simply needs to *detect* whether an aggregate type implements a float / vector homogeneous aggregate as defined by the ELFv2 ABI, and if so, pass/return it as array type using the appropriate float / vector element type. llvm-svn: 213494
* [ARM] Fix AAPCS regression caused by r211898Oliver Stannard2014-07-181-1/+5
| | | | | | | | | | | | | r211898 introduced a regression where a large struct, which would normally be passed ByVal, was causing padding to be inserted to prevent the backend from using some GPRs, in order to follow the AAPCS. However, the type of the argument was not being set correctly, so the backend cannot align 8-byte aligned struct types on the stack. The fix is to not insert the padding arguments when the argument is being passed ByVal. llvm-svn: 213359
* [PowerPC] ABI support for aligned by-value aggregatesUlrich Weigand2014-07-101-1/+50
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for respecting the ABI and type alignment of aggregates passed by value. Currently, all aggregates are aligned at 8 bytes in the parameter save area. This is incorrect for two reasons: - Aggregates that need alignment of 16 bytes or more should be aligned at 16 bytes in the parameter save area. This is implemented by using an appropriate "byval align" attribute in the IR. - Aggregates that need alignment beyond 16 bytes need to be dynamically realigned by the caller. This is implemented by setting the Realign flag of the ABIArgInfo::getIndirect call. In addition, when expanding a va_arg call accessing a type that is aligned at 16 bytes in the argument save area (either one of the aggregate types as above, or a vector type which is already aligned at 16 bytes), code needs to align the va_list pointer accordingly. Reviewed by Hal Finkel. llvm-svn: 212743
* [PowerPC] ABI support for non-Altivec vector typesUlrich Weigand2014-07-101-1/+26
| | | | | | | | | | | | | | | | | | | | | This patch adds support for passing arguments of non-Altivec vector type (i.e. defined via attribute ((vector_size (...)))) on powerpc64-linux. While such types are not mentioned in the formal ABI document, this patch implements a calling convention compatible with GCC: - Vectors of size < 16 bytes are passed in a GPR - Vectors of size > 16 bytes are passed via reference Note that vector types with a number of elements that is not a power of 2 are not supported by GCC, so there is no pre-existing ABI to follow. We choose to pass those (of size < 16) as if widened to the next power of two, so they might end up in a vector register or in a GPR. (Sizes > 16 are always passed via reference as well.) Reviewed by Hal Finkel. llvm-svn: 212734
* MS ABI: Fix __fastcall methods that return structsReid Kleckner2014-07-101-1/+9
| | | | | | | | | The sret paramater consumes the register after the implicit 'this' parameter, as with other calling conventions. Fixes PR20278, which turned out to be very easy. llvm-svn: 212669
* Fix 'source-level' hyphenationsAlp Toker2014-07-091-1/+1
| | | | llvm-svn: 212621
* Move misplaced x86_32 ABI codeRichard Sandiford2014-07-081-38/+38
| | | | | | | | | | r184166 added an X86_32 function in the middle of the SystemZ code. The SystemZ port had been added only a couple of weeks earlier and the original patch probably predated that. No behavioral change intended. llvm-svn: 212524
* ARMEB: Fix function result return for composite typesChristian Pirker2014-07-031-0/+4
| | | | | | Reviewed at http://reviews.llvm.org/D4364 llvm-svn: 212261
* [ARM] Fix AAPCS non-compliance caused by very large structsOliver Stannard2014-06-271-3/+6
| | | | | | | | | | | | | | This is a fix to the code in clang which inserts padding arguments to ensure that the ARM backend can emit AAPCS-VFP compliant code. This code needs to track the number of registers which have been allocated in order to do this. When passing a very large struct (>64 bytes) by value, clang emits IR which takes a pointer to the struct, but the backend converts this back to passing the struct in registers and on the stack. The bug was that this was being considered by clang to only use one register, meaning that there were situations in which padding arguments were incorrectly emitted by clang. llvm-svn: 211898
* Correctly Load Mixed FP-GP Variadic Arguments for x86-64.Rafael Espindola2014-06-241-2/+2
| | | | | | | | | | | | | | | | | | | | According to the x86-64 ABI, structures with both floating point and integer members are split between floating-point and general purpose registers, and consecutive 32-bit floats can be packed into a single floating point register. In the case of variadic functions these are stored to memory and the position recorded in the va_list. This was already correctly implemented in llvm.va_start. The problem is that the code in clang for implementing va_arg was reading floating point registers from the wrong location. Patch by Thomas Jablin. Fixes PR20018. llvm-svn: 211626
* [PowerPC] Fix small argument stack slot offset for LEUlrich Weigand2014-06-201-3/+7
| | | | | | | | | | | | | | | | | When small arguments (structures < 8 bytes or "float") are passed in a stack slot in the ppc64 SVR4 ABI, they must reside in the least significant part of that slot. On BE, this means that an offset needs to be added to the stack address of the parameter, but on LE, the least significant part of the slot has the same address as the slot itself. For the most part, this is handled in the LLVM back-end, where I just fixed the LE case in commit r211368. However, there is one piece of the clang front-end that is also aware of these stack-slot offsets: PPC64_SVR4_ABIInfo::EmitVAArg. This patch updates that routine to take endianness into account. llvm-svn: 211370
* StringRefize TargetInfo::getABI()Alp Toker2014-06-071-3/+3
| | | | llvm-svn: 210402
* XCore target: Fix 'typestring' binding qualifier to the array and not the typeRobert Lytton2014-06-051-6/+12
| | | | | | Differential Revision: http://reviews.llvm.org/D3949 llvm-svn: 210250
* AArch64/ARM64: rename ARM64 components to AArch64Tim Northover2014-05-241-20/+20
| | | | | | This keeps Clang consistent with backend naming conventions. llvm-svn: 209579
* AArch64/ARM64: update Clang after AArch64 removal.Tim Northover2014-05-241-219/+2
| | | | | | | | | | | A few (mostly CodeGen) parts of Clang were tightly coupled to the AArch64 backend. Now that it's gone, they will not even compile. I've also deduplicated RUN lines in many of the AArch64 tests. This might improve "make check-all" time noticably: some of those NEON tests were monsters. llvm-svn: 209578
* [C++11] Use 'nullptr'. CodeGen edition.Craig Topper2014-05-211-40/+40
| | | | llvm-svn: 209272
* XCore target: sort typestring enum fields alphabeticallyRobert Lytton2014-05-201-16/+23
| | | | llvm-svn: 209196
* ARM: PCS non-compliance when struct is padded to avoid register/stack split, ↵Oliver Stannard2014-05-191-4/+8
| | | | | | | | | | and requires internal padding When we were padding a struct to avoid splitting it between registers and the stack, we were throwing away the type which the argument should be coerced to. llvm-svn: 209122
* Update for llvm api change.Rafael Espindola2014-05-171-2/+2
| | | | llvm-svn: 209077
* Update for llvm api change.Rafael Espindola2014-05-171-3/+2
| | | | llvm-svn: 209074
* CodeGen: remove MinGW and Cygwin legacy entriesSaleem Abdulrasool2014-05-171-2/+0
| | | | | | | | | These are now treated as environments. Remove references to these enumeration values in order to clean up the unused enumeration entries in LLVM. The target normalisation prior to tool invocation should ensure that the old values continue to function properly. llvm-svn: 209068
* Update for llvm api change.Rafael Espindola2014-05-161-1/+1
| | | | | | | | | | Now that llvm cannot represent alias cycles, we have to diagnose erros just before trying to close the cycle. This degrades the errors a bit. The real solution is what it was before: if we want to provide good errors for these cases, we have to be able to find a clang level decl given a mangled name and produce the error from Sema. llvm-svn: 209008
* Update for llvm API change.Rafael Espindola2014-05-161-3/+3
| | | | llvm-svn: 208984
* Push record return type classification into CGCXXABIReid Kleckner2014-05-131-102/+43
| | | | | | | | | | | | In the Microsoft C++ ABI, instance methods always return records indirectly via the second hidden parameter. This was implemented in X86_32ABIInfo, but not WinX86_64ABIInfo. Rather than exposing a handful of boolean methods in the CGCXXABI interface, we can expose a single method that applies C++ ABI return value classification rules. llvm-svn: 208733
* MS ABI: Pass 'sret' as the second parameter of instance methodsReid Kleckner2014-05-091-6/+14
| | | | | | | | | | | | | | | | | Summary: MSVC always passes 'sret' after 'this', unlike GCC. This required changing a number of places in Clang that assumed the sret parameter was always first in LLVM IR. This fixes win64 MSVC ABI compatibility for methods returning structs. Reviewers: rsmith, majnemer Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D3618 llvm-svn: 208458
* Reapply r208417 (olista01 'ARM: HFAs must be passed in consecutive ↵James Molloy2014-05-091-19/+6
| | | | | | registers'). Bots are now pacified. llvm-svn: 208425
* Revert r208417 (olista01 'ARM: HFAs must be passed in consecutive ↵James Molloy2014-05-091-6/+19
| | | | | | registers'). This is a followon commit from r208413 which broke the LLVM bots. llvm-svn: 208422
* ARM: HFAs must be passed in consecutive registersOliver Stannard2014-05-091-19/+6
| | | | | | | This is the clang counterpart to 208413, which ensures that Homogeneous Floating-point Aggregates are passed in consecutive registers on ARM. llvm-svn: 208417
* Replace virtual with override.Rafael Espindola2014-05-081-2/+2
| | | | llvm-svn: 208324
* [ARM64-BE] Correctly deal with single element HFAs in varargs.James Molloy2014-05-071-2/+4
| | | | | | | Just because the first "if" didn't fire, doesn't mean we can not have an HFA in the "else" clause. llvm-svn: 208216
* ARM: Fix assertion caused by passing bitfield struct using ↵Oliver Stannard2014-05-071-1/+2
| | | | | | | | | | | | ABIArgInfo::getExpandWithPadding In cases where a struct must, according to the AAPCS, not be split between general purpose and floating point registers, we use ABIArgInfo::getExpandWithPadding to add the padding arguments. However, ExpandWithPadding does not work if the struct contains bitfields, so we instead must use ABIArgInfo::getDirect. llvm-svn: 208185
* XCore target: fix initialization bug found by MSan Bot.Robert Lytton2014-05-061-0/+1
| | | | llvm-svn: 208072
* XCore target: Add TypeString meta data to IR output.Robert Lytton2014-05-021-0/+542
| | | | | | | This includes the addition of the virtual function: TargetCodeGenInfo::EmitTargetMD() llvm-svn: 207832
* Remove unused variable that I missed in my rush to fix the botsReid Kleckner2014-05-021-1/+1
| | | | llvm-svn: 207820
* Win64: Use ConvertType instead of checking the MS inheritanceReid Kleckner2014-05-021-12/+5
| | | | | | | | dependent-type-member-pointer.cpp is failing on a win64 bot because -fms-extensions is not enabled. Use ConvertType rather than relying on the inheritance attributes. It's less code, but probably slower. llvm-svn: 207819
* Win64: Pass member pointers larger than 8 bytes by referenceReid Kleckner2014-05-021-6/+23
| | | | | | | | | | | | | The Win64 ABI docs on MSDN say that arguments bigger than 8 bytes are passed by reference. Prior to this change, we were only applying this logic to RecordType arguments. This affects both the Itanium and Microsoft C++ ABIs. Reviewers: majnemer Differential Revision: http://reviews.llvm.org/D3587 llvm-svn: 207817
* [ARM64] Add a missed case label for arm64_be, and enable the aarch64-varargs ↵James Molloy2014-04-231-1/+2
| | | | | | | | test for arm64_be. This ensures that r203917 (cpirker "AArch64_be varargs processing for ARM ABI") is ported to ARM64. llvm-svn: 206961
* ARM64: Do not expand variadic HFA/HVA arguments with the Darwin ABI.Bob Wilson2014-04-211-6/+24
| | | | | | | | | | | Unlike the standard AAPCS64 ABI, variadic arguments are always passed on the stack with the Darwin ABI, and this was not being considered when deciding whether to expand HFA/HVA arguments in a call. An HFA argument with a "float" base type was being expanded into separate "float" arguments, each of which was then extended to a double, resulting in a serious mismatch from what is expected by the va_arg implementation. <rdar://problem/15777067> llvm-svn: 206729
* Fix a comment typo.Bob Wilson2014-04-211-1/+1
| | | | llvm-svn: 206728
* ARM64: make sure the caller is expected to extend in AAPCS.Tim Northover2014-04-181-2/+3
| | | | | | | This is one of those DarwinPCS differences. It'd been caught in arguments, but not return values. llvm-svn: 206594
* ARM64: make sure HFAs on the stack get properly aligned.Tim Northover2014-04-181-7/+8
| | | | | | Another AAPCS bug, part of PR19432. llvm-svn: 206580
* ARM64: remove holes from *all* HFAs on the stack.Tim Northover2014-04-171-13/+15
| | | | | | | | | | My first attempt to make sure HFAs were contiguous was in the block dealing with padding registers, which meant it only triggered on the first stack-based HFA. This should extend it to the rest as well. Another part of PR19432. llvm-svn: 206456
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