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* AMDGPU/GlobalISel: Fix RegBankSelect for G_FRINT and G_FCEILMatt Arsenault2019-09-163-0/+64
| | | | llvm-svn: 371991
* AMDGPU/GlobalISel: Remove another illegal select testMatt Arsenault2019-09-161-37/+0
| | | | llvm-svn: 371990
* [X86][NFC] Add a `use-aa` feature.Clement Courbet2019-09-162-0/+8
| | | | | | | | | | | | | | | | | | Summary: This allows enabling useaa on the command-line and will allow enabling the feature on a per-CPU basis where benchmarking shows improvements. This is modelled after the ARM/AArch64 target. Reviewers: RKSimon, andreadb, craig.topper Subscribers: javed.absar, kristof.beyls, hiraditya, ychen, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67266 llvm-svn: 371989
* [InstCombine] add/move tests for icmp with add operand; NFCSanjay Patel2019-09-162-86/+144
| | | | llvm-svn: 371988
* [clangd][vscode] update the development doc.Haojian Wu2019-09-161-2/+2
| | | | llvm-svn: 371986
* Move some definitions from Sema to Basic to fix shared libs buildErich Keane2019-09-163-88/+91
| | | | | | | | r371875 moved some functionality around to a Basic header file, but didn't move its definitions as well. This patch moves some things around so that shared library building can work. llvm-svn: 371985
* [docs][llvm-strings] Write llvm-strings documentationJames Henderson2019-09-161-3/+118
| | | | | | | | | | Previously we only had a stub document. Reviewed by: MaskRay Differential Revision: https://reviews.llvm.org/D67554 llvm-svn: 371984
* [docs][llvm-size] Write llvm-size documentationJames Henderson2019-09-161-3/+186
| | | | | | | | | | Previously we only had a stub document. Reviewed by: serge-sans-paille, MaskRay Differential Revision: https://reviews.llvm.org/D67555 llvm-svn: 371983
* [ARM] Fold VCMP into VPTDavid Green2019-09-1620-464/+383
| | | | | | | | | | | | | | | MVE has VPT instructions, which perform the duties of both a VCMP and a VPST in a single instruction, performing the compare and starting the VPT block in one. This teaches the MVEVPTBlockPass to fold them, searching back through the basicblock for a valid VCMP and creating the VPT from its operands. There are some changes to the VPT instructions to accommodate this, altering the order of the operands to match the VCMP better, and changing P0 register defs to be VPR defs, as is used in other places. Differential Revision: https://reviews.llvm.org/D66577 llvm-svn: 371982
* [InstCombine] remove unneeded one-use checks for icmp foldSanjay Patel2019-09-162-6/+3
| | | | | | | | | | | | | | | | | | | | This fold and several others were added in: rL125734 <https://reviews.llvm.org/rL125734> ...with no explanation for the one-use checks other than the code comments about register pressure. Given that this is IR canonicalization, we shouldn't be worried about register pressure though; the backend should be able to adjust for that as needed. This is part of solving PR43310 the theoretically right way: https://bugs.llvm.org/show_bug.cgi?id=43310 ...ie, if we don't cripple basic transforms, then we won't need to add special-case code to detect larger patterns. rL371940 is a related patch in this series. llvm-svn: 371981
* [clangd] Bump vscode-clangd v0.0.17Haojian Wu2019-09-161-1/+1
| | | | | | | | | | | CHANGELOG: - added semantic highlighting support (under the clangd.semanticHighlighting flag); - better error message when clangd fails to execute refactoring-like actions; - improved the readme doc; llvm-svn: 371980
* [InstCombine] add icmp tests with extra uses; NFCSanjay Patel2019-09-161-0/+34
| | | | llvm-svn: 371979
* [InstCombine] fix comments to match code; NFCSanjay Patel2019-09-161-25/+27
| | | | | | | | | | This blob was written before match() existed, so it could probably be reduced significantly. But I suspect it isn't well tested, so tests would have to be added to reduce risk from logic changes. llvm-svn: 371978
* gn build: Merge r371976Nico Weber2019-09-162-0/+2
| | | | llvm-svn: 371977
* Implement semantic selections.Utkarsh Saxena2019-09-165-0/+241
| | | | | | | | | | | | | | Summary: For a given cursor position, it returns ranges that are interesting to the user. Currently the semantic ranges correspond to the nodes of the syntax trees. Subscribers: mgorny, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D67358 llvm-svn: 371976
* [VPlanSLP] Don't dereference a cast_or_null<VPInstruction> result. NFCI.Simon Pilgrim2019-09-161-5/+8
| | | | | | The static analyzer is warning about a potential null dereference of the cast_or_null result, I've split the cast_or_null check from the ->getUnderlyingInstr() call to avoid this, but it appears that we weren't seeing any null pointers in the dumped bundles in the first place. llvm-svn: 371975
* [SLPVectorizer] Assert that we find a LastInst to silence analyzer null ↵Simon Pilgrim2019-09-161-0/+1
| | | | | | dereference warning. NFCI. llvm-svn: 371974
* [SLPVectorizer] Don't dereference a dyn_cast result. NFCI.Simon Pilgrim2019-09-161-4/+4
| | | | | | The static analyzer is warning about potential null dereferences of dyn_cast<> results - in these cases we can safely use cast<> directly as we know that these cases should all be the correct type, which is why its working atm and anyway cast<> will assert if they aren't. llvm-svn: 371973
* Added return statement to fix compile and build warning:Sjoerd Meijer2019-09-161-0/+1
| | | | | | llvm-rtdyld.cpp:966:7: warning: variable ‘Result’ set but not used llvm-svn: 371972
* [clangd] Fix a crash when renaming operator.Haojian Wu2019-09-163-2/+12
| | | | | | | | | | | | | | | | | | | | Summary: The renamelib uses a tricky way to calculate the end location by relying on decl name, this is incorrect for the overloaded operator (the name is "operator++" instead of "++"), which will cause out-of-file offset. We also disable renaming operator symbol, this case is tricky, and renamelib doesnt handle it properly. Reviewers: ilya-biryukov Subscribers: MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D67607 llvm-svn: 371971
* [ELF][ARM] Fix -Werror buildbots NFC.Peter Smith2019-09-161-1/+1
| | | | | | | | | | Provide a missing initializer to get rid of warning provoking buildbot failures. error: missing field 'rel' initializer [-Werror,-Wmissing-field-initializers] llvm-svn: 371970
* Change signature of __builtin_rotateright64 back to unsignedKarl-Johan Karlsson2019-09-162-1/+5
| | | | | | | | | | | | | | | | The signature of __builtin_rotateright64 was by misstake changed from unsigned to signed in r360863, this patch will change it back to unsigned as intended. This fixes pr43309 Reviewers: efriedma, hans Reviewed By: hans Differential Revision: https://reviews.llvm.org/D67606 llvm-svn: 371969
* Fix the rst doc, unbreak buildbot.Haojian Wu2019-09-161-0/+1
| | | | llvm-svn: 371968
* [SVE][Inline-Asm] Add constraints for SVE predicate registersKerry McLaughlin2019-09-166-1/+81
| | | | | | | | | | | | | | | | | | | Summary: Adds the following inline asm constraints for SVE: - Upl: One of the low eight SVE predicate registers, P0 to P7 inclusive - Upa: SVE predicate register with full range, P0 to P15 Reviewers: t.p.northover, sdesmalen, rovka, momchil.velikov, cameron.mcinally, greened, rengolin Reviewed By: rovka Subscribers: javed.absar, tschuett, rkruppe, psnobl, cfe-commits, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66524 llvm-svn: 371967
* gn build: Merge r371965Nico Weber2019-09-161-0/+1
| | | | llvm-svn: 371966
* [ELF][ARM] Implement --fix-cortex-a8 to fix erratum 657417Peter Smith2019-09-1614-7/+1109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The --fix-cortex-a8 option implements a linker workaround for the coretex-a8 erratum 657417. A summary of the erratum conditions is: - A 32-bit Thumb-2 branch instruction B.w, Bcc.w, BL, BLX spans two 4KiB regions. - The destination of the branch is to the first 4KiB region. - The instruction before the branch is a 32-bit Thumb-2 non-branch instruction. The linker fix is to redirect the branch to a patch not in the first 4KiB region. The patch forwards the branch on to its target. The cortex-a8, is an old CPU, with the first implementation of this workaround in ld.bfd appearing in 2009. The cortex-a8 has been used in early Android Phones and there are some critical applications that still need to run on a cortex-a8 that have the erratum. The patch is applied roughly 10 times on LLD and 20 on Clang when they are built with --fix-cortex-a8 on an Arm system. The formal erratum description is avaliable in the ARM Core Cortex-A8 (AT400/AT401) Errata Notice document. This is available from Arm on request but it seems to be findable via a web search. Differential Revision: https://reviews.llvm.org/D67284 llvm-svn: 371965
* [clang-tidy] performance-inefficient-vector-operation: Support proto ↵Haojian Wu2019-09-164-57/+226
| | | | | | | | | | | | | | | | | | | | | | | | | repeated field Summary: Finds calls that add element to protobuf repeated field in a loop without calling Reserve() before the loop. Calling Reserve() first can avoid unnecessary memory reallocations. A new option EnableProto is added to guard this feature. Patch by Cong Liu! Reviewers: gribozavr, alexfh, hokein, aaron.ballman Reviewed By: hokein Subscribers: lebedev.ri, xazax.hun, Eugene.Zelenko, cfe-commits Tags: #clang, #clang-tools-extra Differential Revision: https://reviews.llvm.org/D67135 llvm-svn: 371963
* [test] Add -z separate-code to fix tests that ae sensitive to exact ↵Fangrui Song2019-09-166-6/+6
| | | | | | addresses after r371958 llvm-svn: 371962
* gn build: Merge r371959Nico Weber2019-09-161-1/+0
| | | | llvm-svn: 371961
* [AArch64] Some more FP16 FMA pattern matchingSjoerd Meijer2019-09-163-18/+72
| | | | | | | | | After our previous machinecombiner exercises (rL371321, rL371818, rL371833), we were still missing a few FP16 FMA patterns. Differential Revision: https://reviews.llvm.org/D67576 llvm-svn: 371960
* [SystemZ] Merge the SystemZExpandPseudo pass into SystemZPostRewrite.Jonas Paulsson2019-09-168-278/+175
| | | | | | | | | | | | | | | | | SystemZExpandPseudo:s only job was to expand LOCRMux instructions into jump sequences. This needs to be done if expandLOCRPseudo() or expandSELRPseudo() fails to find a legal opcode (all registers "high" or "low"). This task has now been moved to SystemZPostRewrite while removing the SystemZExpandPseudo pass. It is in fact preferred to expand these pseudos directly after register allocation in SystemZPostRewrite since the hinted register combinations are then not subject to later optimizations. Review: Ulrich Weigand https://reviews.llvm.org/D67432 llvm-svn: 371959
* [ELF][X86] Allow PT_LOAD to have overlapping p_offset ranges on EM_X86_64Fangrui Song2019-09-16119-787/+792
| | | | | | | | Port the D64906 technique to EM_X86_64. Differential Revision: https://reviews.llvm.org/D67482 llvm-svn: 371958
* [ELF] Map the ELF header at imageBaseFangrui Song2019-09-167-48/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If there is no readonly section, we map: * The ELF header at imageBase+maxPageSize * Program headers at imageBase+maxPageSize+sizeof(Ehdr) * The first section .text at imageBase+maxPageSize+sizeof(Ehdr)+sizeof(program headers) Due to the interaction between Writer<ELFT>::fixSectionAlignments and LinkerScript::allocateHeaders, `alignDown(p_vaddr(R PT_LOAD)) = alignDown(p_vaddr(RX PT_LOAD))`. The RX PT_LOAD will override the R PT_LOAD at runtime, which is not ideal: ``` // PHDR at 0x401034, should be 0x400034 PHDR 0x000034 0x00401034 0x00401034 0x000a0 0x000a0 R 0x4 // R PT_LOAD contains just Ehdr and program headers. // At 0x401000, should be 0x400000 LOAD 0x000000 0x00401000 0x00401000 0x000d4 0x000d4 R 0x1000 LOAD 0x0000d4 0x004010d4 0x004010d4 0x00001 0x00001 R E 0x1000 ``` * createPhdrs allocates the headers to the R PT_LOAD. * fixSectionAlignments assigns `imageBase+maxPageSize+sizeof(Ehdr)+sizeof(program headers)` (formula: `alignTo(dot, maxPageSize) + dot % config->maxPageSize`) to addrExpr of .text * allocateHeaders computes the minimum address among SHF_ALLOC sections, i.e. addr(.text) * allocateHeaders sets address of ELF header to `addr(.text)-sizeof(Ehdr)-sizeof(program headers) = imageBase+maxPageSize` The main observation is that when the SECTIONS command is not used, we don't have to call allocateHeaders. This requires an assumption that the presence of PT_PHDR and addresses of headers can be decided regardless of address information. This may seem natural because dot is not manipulated by a linker script. The other thing is that we have to drop the special rule for -T<section> in `getInitialDot`. If -Ttext is smaller than the image base, the headers will not be allocated with the old behavior (allocateHeaders is called) but always allocated with the new behavior. The behavior change is not a problem. Whether and where headers are allocated can vary among linkers, or ld.bfd across different versions (--enable-separate-code or not). It is thus advised to use a linker script with the PHDRS command to have a consistent behavior across linkers. If PT_PHDR is needed, an explicit --image-base can be a simpler alternative. Differential Revision: https://reviews.llvm.org/D67325 llvm-svn: 371957
* AMDGPU/GlobalISel: Remove illegal select testsMatt Arsenault2019-09-161-74/+0
| | | | | | These fail in a release build. llvm-svn: 371955
* AMDGPU/GlobalISel: Select SMRD loads for more typesMatt Arsenault2019-09-162-3/+1019
| | | | llvm-svn: 371954
* AMDGPU/GlobalISel: RegBankSelect for killMatt Arsenault2019-09-162-0/+72
| | | | llvm-svn: 371953
* AMDGPU/GlobalISel: Legalize s1 source G_[SU]ITOFPMatt Arsenault2019-09-163-1/+74
| | | | llvm-svn: 371952
* AMDGPU/GlobalISel: Set type on vgpr live in special argumentsMatt Arsenault2019-09-162-1/+29
| | | | | | | Fixes assertion with workitem ID intrinsics used in non-kernel functions. llvm-svn: 371951
* AMDGPU/GlobalISel: Select S16->S32 fptointMatt Arsenault2019-09-164-8/+213
| | | | llvm-svn: 371950
* AMDGPU/GlobalISel: Select s32->s16 G_[US]ITOFPMatt Arsenault2019-09-165-11/+145
| | | | llvm-svn: 371949
* AMDGPU/GlobalISel: Fix VALU s16 fnegMatt Arsenault2019-09-162-11/+19
| | | | llvm-svn: 371948
* [Attributor] Heap-To-Stack ConversionStefan Stipanovic2019-09-153-7/+624
| | | | | | | | | | | | D53362 gives a prototype heap-to-stack conversion pass. With addition of new attributes in the attributor, this can now be revisted and improved. This will place it in the Attributor to make it easier to use new attributes (eg. nofree, nosync, willreturn, etc.) and other attributor features. Reviewers: jdoerfert, uenoku, hfinkel, efriedma Subscribers: lebedev.ri, xbolva00, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D65408 llvm-svn: 371942
* Commit missing part of "Split many_tls_keys.cpp into two tests"Kamil Rytarowski2019-09-152-28/+8
| | | | | | | | https://reviews.llvm.org/D67428 This change was lost due to a file rename and modification. llvm-svn: 371941
* [InstCombine] remove unneeded one-use checks for icmp foldSanjay Patel2019-09-152-5/+6
| | | | | | | | | | | | | | | | | | | | | | | This fold and several others were added in: rL125734 ...with no explanation for the one-use checks other than the code comments about register pressure. Given that this is IR canonicalization, we shouldn't be worried about register pressure though; the backend should be able to adjust for that as needed. There are similar checks as noted with the TODO comments. I'm hoping to remove those restrictions too, but if any of these does cause a regression, it should be easier to correct by making small, individual commits. This is part of solving PR43310 the theoretically right way: https://bugs.llvm.org/show_bug.cgi?id=43310 ...ie, if we don't cripple basic transforms, then we won't need to add special-case code to detect larger patterns. llvm-svn: 371940
* [InstCombine] add icmp tests with extra uses; NFCSanjay Patel2019-09-151-0/+34
| | | | llvm-svn: 371939
* [PowerPC][NFC] Add a testcase for fdiv expansion.Jinsong Ji2019-09-151-0/+16
| | | | | | Pre-commit for following patch. llvm-svn: 371938
* [GlobalISel] findGISelOptimalMemOpLowering - remove dead initalization. NFCI.Simon Pilgrim2019-09-151-3/+1
| | | | | | Fixes static analyzer warning that "Value stored to 'NewTySize' during its initialization is never read". llvm-svn: 371937
* [LoadStoreVectorizer] vectorizeLoadChain - ensure we find a valid Type down ↵Simon Pilgrim2019-09-151-1/+2
| | | | | | | | the load chain. NFCI. Silence static analyzer uninitialized variable warning by setting the LoadTy to null and then asserting we find a real value. llvm-svn: 371936
* InterleavedLoadCombine - merge isa<> and dyn_cast<> duplicates. NFCI.Simon Pilgrim2019-09-151-2/+2
| | | | | | Silence static analyzer null dereference warning of *dyn_cast<BinaryOperator> by merging with the isa<BinaryOperator> above. llvm-svn: 371935
* [OpenMP] Fix OMPClauseReader::readClause() uninitialized variable warning. NFCI.Simon Pilgrim2019-09-151-1/+3
| | | | | | Fixes static analyzer uninitialized variable warning for the OMPClause - the function appears to cover all cases, but I've added an assertion to make sure. llvm-svn: 371934
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