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* [ELF][ARM] Fix -Werror buildbots NFC.Peter Smith2019-09-161-1/+1
| | | | | | | | | | Provide a missing initializer to get rid of warning provoking buildbot failures. error: missing field 'rel' initializer [-Werror,-Wmissing-field-initializers] llvm-svn: 371970
* Change signature of __builtin_rotateright64 back to unsignedKarl-Johan Karlsson2019-09-162-1/+5
| | | | | | | | | | | | | | | | The signature of __builtin_rotateright64 was by misstake changed from unsigned to signed in r360863, this patch will change it back to unsigned as intended. This fixes pr43309 Reviewers: efriedma, hans Reviewed By: hans Differential Revision: https://reviews.llvm.org/D67606 llvm-svn: 371969
* Fix the rst doc, unbreak buildbot.Haojian Wu2019-09-161-0/+1
| | | | llvm-svn: 371968
* [SVE][Inline-Asm] Add constraints for SVE predicate registersKerry McLaughlin2019-09-166-1/+81
| | | | | | | | | | | | | | | | | | | Summary: Adds the following inline asm constraints for SVE: - Upl: One of the low eight SVE predicate registers, P0 to P7 inclusive - Upa: SVE predicate register with full range, P0 to P15 Reviewers: t.p.northover, sdesmalen, rovka, momchil.velikov, cameron.mcinally, greened, rengolin Reviewed By: rovka Subscribers: javed.absar, tschuett, rkruppe, psnobl, cfe-commits, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66524 llvm-svn: 371967
* gn build: Merge r371965Nico Weber2019-09-161-0/+1
| | | | llvm-svn: 371966
* [ELF][ARM] Implement --fix-cortex-a8 to fix erratum 657417Peter Smith2019-09-1614-7/+1109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The --fix-cortex-a8 option implements a linker workaround for the coretex-a8 erratum 657417. A summary of the erratum conditions is: - A 32-bit Thumb-2 branch instruction B.w, Bcc.w, BL, BLX spans two 4KiB regions. - The destination of the branch is to the first 4KiB region. - The instruction before the branch is a 32-bit Thumb-2 non-branch instruction. The linker fix is to redirect the branch to a patch not in the first 4KiB region. The patch forwards the branch on to its target. The cortex-a8, is an old CPU, with the first implementation of this workaround in ld.bfd appearing in 2009. The cortex-a8 has been used in early Android Phones and there are some critical applications that still need to run on a cortex-a8 that have the erratum. The patch is applied roughly 10 times on LLD and 20 on Clang when they are built with --fix-cortex-a8 on an Arm system. The formal erratum description is avaliable in the ARM Core Cortex-A8 (AT400/AT401) Errata Notice document. This is available from Arm on request but it seems to be findable via a web search. Differential Revision: https://reviews.llvm.org/D67284 llvm-svn: 371965
* [clang-tidy] performance-inefficient-vector-operation: Support proto ↵Haojian Wu2019-09-164-57/+226
| | | | | | | | | | | | | | | | | | | | | | | | | repeated field Summary: Finds calls that add element to protobuf repeated field in a loop without calling Reserve() before the loop. Calling Reserve() first can avoid unnecessary memory reallocations. A new option EnableProto is added to guard this feature. Patch by Cong Liu! Reviewers: gribozavr, alexfh, hokein, aaron.ballman Reviewed By: hokein Subscribers: lebedev.ri, xazax.hun, Eugene.Zelenko, cfe-commits Tags: #clang, #clang-tools-extra Differential Revision: https://reviews.llvm.org/D67135 llvm-svn: 371963
* [test] Add -z separate-code to fix tests that ae sensitive to exact ↵Fangrui Song2019-09-166-6/+6
| | | | | | addresses after r371958 llvm-svn: 371962
* gn build: Merge r371959Nico Weber2019-09-161-1/+0
| | | | llvm-svn: 371961
* [AArch64] Some more FP16 FMA pattern matchingSjoerd Meijer2019-09-163-18/+72
| | | | | | | | | After our previous machinecombiner exercises (rL371321, rL371818, rL371833), we were still missing a few FP16 FMA patterns. Differential Revision: https://reviews.llvm.org/D67576 llvm-svn: 371960
* [SystemZ] Merge the SystemZExpandPseudo pass into SystemZPostRewrite.Jonas Paulsson2019-09-168-278/+175
| | | | | | | | | | | | | | | | | SystemZExpandPseudo:s only job was to expand LOCRMux instructions into jump sequences. This needs to be done if expandLOCRPseudo() or expandSELRPseudo() fails to find a legal opcode (all registers "high" or "low"). This task has now been moved to SystemZPostRewrite while removing the SystemZExpandPseudo pass. It is in fact preferred to expand these pseudos directly after register allocation in SystemZPostRewrite since the hinted register combinations are then not subject to later optimizations. Review: Ulrich Weigand https://reviews.llvm.org/D67432 llvm-svn: 371959
* [ELF][X86] Allow PT_LOAD to have overlapping p_offset ranges on EM_X86_64Fangrui Song2019-09-16119-787/+792
| | | | | | | | Port the D64906 technique to EM_X86_64. Differential Revision: https://reviews.llvm.org/D67482 llvm-svn: 371958
* [ELF] Map the ELF header at imageBaseFangrui Song2019-09-167-48/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If there is no readonly section, we map: * The ELF header at imageBase+maxPageSize * Program headers at imageBase+maxPageSize+sizeof(Ehdr) * The first section .text at imageBase+maxPageSize+sizeof(Ehdr)+sizeof(program headers) Due to the interaction between Writer<ELFT>::fixSectionAlignments and LinkerScript::allocateHeaders, `alignDown(p_vaddr(R PT_LOAD)) = alignDown(p_vaddr(RX PT_LOAD))`. The RX PT_LOAD will override the R PT_LOAD at runtime, which is not ideal: ``` // PHDR at 0x401034, should be 0x400034 PHDR 0x000034 0x00401034 0x00401034 0x000a0 0x000a0 R 0x4 // R PT_LOAD contains just Ehdr and program headers. // At 0x401000, should be 0x400000 LOAD 0x000000 0x00401000 0x00401000 0x000d4 0x000d4 R 0x1000 LOAD 0x0000d4 0x004010d4 0x004010d4 0x00001 0x00001 R E 0x1000 ``` * createPhdrs allocates the headers to the R PT_LOAD. * fixSectionAlignments assigns `imageBase+maxPageSize+sizeof(Ehdr)+sizeof(program headers)` (formula: `alignTo(dot, maxPageSize) + dot % config->maxPageSize`) to addrExpr of .text * allocateHeaders computes the minimum address among SHF_ALLOC sections, i.e. addr(.text) * allocateHeaders sets address of ELF header to `addr(.text)-sizeof(Ehdr)-sizeof(program headers) = imageBase+maxPageSize` The main observation is that when the SECTIONS command is not used, we don't have to call allocateHeaders. This requires an assumption that the presence of PT_PHDR and addresses of headers can be decided regardless of address information. This may seem natural because dot is not manipulated by a linker script. The other thing is that we have to drop the special rule for -T<section> in `getInitialDot`. If -Ttext is smaller than the image base, the headers will not be allocated with the old behavior (allocateHeaders is called) but always allocated with the new behavior. The behavior change is not a problem. Whether and where headers are allocated can vary among linkers, or ld.bfd across different versions (--enable-separate-code or not). It is thus advised to use a linker script with the PHDRS command to have a consistent behavior across linkers. If PT_PHDR is needed, an explicit --image-base can be a simpler alternative. Differential Revision: https://reviews.llvm.org/D67325 llvm-svn: 371957
* AMDGPU/GlobalISel: Remove illegal select testsMatt Arsenault2019-09-161-74/+0
| | | | | | These fail in a release build. llvm-svn: 371955
* AMDGPU/GlobalISel: Select SMRD loads for more typesMatt Arsenault2019-09-162-3/+1019
| | | | llvm-svn: 371954
* AMDGPU/GlobalISel: RegBankSelect for killMatt Arsenault2019-09-162-0/+72
| | | | llvm-svn: 371953
* AMDGPU/GlobalISel: Legalize s1 source G_[SU]ITOFPMatt Arsenault2019-09-163-1/+74
| | | | llvm-svn: 371952
* AMDGPU/GlobalISel: Set type on vgpr live in special argumentsMatt Arsenault2019-09-162-1/+29
| | | | | | | Fixes assertion with workitem ID intrinsics used in non-kernel functions. llvm-svn: 371951
* AMDGPU/GlobalISel: Select S16->S32 fptointMatt Arsenault2019-09-164-8/+213
| | | | llvm-svn: 371950
* AMDGPU/GlobalISel: Select s32->s16 G_[US]ITOFPMatt Arsenault2019-09-165-11/+145
| | | | llvm-svn: 371949
* AMDGPU/GlobalISel: Fix VALU s16 fnegMatt Arsenault2019-09-162-11/+19
| | | | llvm-svn: 371948
* [Attributor] Heap-To-Stack ConversionStefan Stipanovic2019-09-153-7/+624
| | | | | | | | | | | | D53362 gives a prototype heap-to-stack conversion pass. With addition of new attributes in the attributor, this can now be revisted and improved. This will place it in the Attributor to make it easier to use new attributes (eg. nofree, nosync, willreturn, etc.) and other attributor features. Reviewers: jdoerfert, uenoku, hfinkel, efriedma Subscribers: lebedev.ri, xbolva00, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D65408 llvm-svn: 371942
* Commit missing part of "Split many_tls_keys.cpp into two tests"Kamil Rytarowski2019-09-152-28/+8
| | | | | | | | https://reviews.llvm.org/D67428 This change was lost due to a file rename and modification. llvm-svn: 371941
* [InstCombine] remove unneeded one-use checks for icmp foldSanjay Patel2019-09-152-5/+6
| | | | | | | | | | | | | | | | | | | | | | | This fold and several others were added in: rL125734 ...with no explanation for the one-use checks other than the code comments about register pressure. Given that this is IR canonicalization, we shouldn't be worried about register pressure though; the backend should be able to adjust for that as needed. There are similar checks as noted with the TODO comments. I'm hoping to remove those restrictions too, but if any of these does cause a regression, it should be easier to correct by making small, individual commits. This is part of solving PR43310 the theoretically right way: https://bugs.llvm.org/show_bug.cgi?id=43310 ...ie, if we don't cripple basic transforms, then we won't need to add special-case code to detect larger patterns. llvm-svn: 371940
* [InstCombine] add icmp tests with extra uses; NFCSanjay Patel2019-09-151-0/+34
| | | | llvm-svn: 371939
* [PowerPC][NFC] Add a testcase for fdiv expansion.Jinsong Ji2019-09-151-0/+16
| | | | | | Pre-commit for following patch. llvm-svn: 371938
* [GlobalISel] findGISelOptimalMemOpLowering - remove dead initalization. NFCI.Simon Pilgrim2019-09-151-3/+1
| | | | | | Fixes static analyzer warning that "Value stored to 'NewTySize' during its initialization is never read". llvm-svn: 371937
* [LoadStoreVectorizer] vectorizeLoadChain - ensure we find a valid Type down ↵Simon Pilgrim2019-09-151-1/+2
| | | | | | | | the load chain. NFCI. Silence static analyzer uninitialized variable warning by setting the LoadTy to null and then asserting we find a real value. llvm-svn: 371936
* InterleavedLoadCombine - merge isa<> and dyn_cast<> duplicates. NFCI.Simon Pilgrim2019-09-151-2/+2
| | | | | | Silence static analyzer null dereference warning of *dyn_cast<BinaryOperator> by merging with the isa<BinaryOperator> above. llvm-svn: 371935
* [OpenMP] Fix OMPClauseReader::readClause() uninitialized variable warning. NFCI.Simon Pilgrim2019-09-151-1/+3
| | | | | | Fixes static analyzer uninitialized variable warning for the OMPClause - the function appears to cover all cases, but I've added an assertion to make sure. llvm-svn: 371934
* [DebugInfo] Don't dereference a dyn_cast<PDBSymbolData> result. NFCI.Simon Pilgrim2019-09-151-1/+1
| | | | | | The static analyzer is warning about a potential null dereference - but as we're in DataMemberLayoutItem we should be able to guarantee that the Symbol is a PDBSymbolData type, allowing us to use cast<PDBSymbolData> - and if not assert will fire for us. llvm-svn: 371933
* [ARM] Masked loads and storesDavid Green2019-09-158-7037/+647
| | | | | | | | | | | | | | | | Masked loads and store fit naturally with MVE, the instructions being easily predicated. This adds lowering for the simple cases of masked loads and stores. It does not yet deal with widening/narrowing or pre/post inc, and so is currently behind an option. The llvm masked load intrinsic will accept a "passthru" value, dictating the values used for the zero masked lanes. In MVE the instructions write 0 to the zero predicated lanes, so we need to match a passthru that isn't 0 (or undef) with a select instruction to pull in the correct data after the load. Differential Revision: https://reviews.llvm.org/D67186 llvm-svn: 371932
* [SLP] limit vectorization of Constant subclasses (PR33958)Sanjay Patel2019-09-152-8/+14
| | | | | | | | | | | | | | This is a fix for: https://bugs.llvm.org/show_bug.cgi?id=33958 It seems universally true that we would not want to transform this kind of sequence on any target, but if that's not correct, then we could view this as a target-specific cost model problem. We could also white-list ConstantInt, ConstantFP, etc. rather than blacklist Global and ConstantExpr. Differential Revision: https://reviews.llvm.org/D67362 llvm-svn: 371931
* [ARM] Simplify and update vmla test. NFCDavid Green2019-09-152-39/+38
| | | | llvm-svn: 371930
* [CodeEmitter] Improve testing for APInt encodingJames Molloy2019-09-151-10/+7
| | | | | | | | I missed Artem's comment in D67487 before committing. Differential Revision: https://reviews.llvm.org/D67487 llvm-svn: 371929
* [CodeEmitter] Support instruction widths > 64 bitsJames Molloy2019-09-153-39/+223
| | | | | | | | | | | | | | | | | | | | | | | | | | Some VLIW instruction sets are Very Long Indeed. Using uint64_t constricts the Inst encoding to 64 bits (naturally). This change switches CodeEmitter to a mode that uses APInts when Inst's bitwidth is > 64 bits (NFC for existing targets). When Inst.BitWidth > 64 the prototype changes to: void TargetMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups, APInt &Inst, APInt &Scratch, const MCSubtargetInfo &STI); The Inst parameter returns the encoded instruction, the Scratch parameter is used internally for manipulating operands and is exposed so that the underlying storage can be reused between calls to getBinaryCodeForInstr. The goal is to elide any APInt constructions that we can. Similarly the operand encoding prototype changes to: getMachineOpValue(const MCInst &MI, const MCOperand &MO, APInt &op, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI); That is, the operand is passed by reference as APInt rather than returned as uint64_t. To reiterate, this APInt mode is enabled only when Inst.BitWidth > 64, so this change is NFC for existing targets. llvm-svn: 371928
* lld-link: Make Options.td formatting more self-consistent.Nico Weber2019-09-141-13/+19
| | | | | | | | Also tighten up help strings for /force, --start-lib, and --end-lib. Differential Revision: https://reviews.llvm.org/D67457 llvm-svn: 371927
* compiler-rt/builtins: Make check-builtins run tests on macOS.Nico Weber2019-09-142-4/+11
| | | | | | Differential Revision: https://reviews.llvm.org/D66984 llvm-svn: 371926
* Add debug check for null pointers passed to <string_view>Eric Fiselier2019-09-143-1/+49
| | | | llvm-svn: 371925
* [Diagnostics] Added silence note for -Wsizeof-array-div; suggest extra parensDavid Bolvansky2019-09-142-3/+22
| | | | llvm-svn: 371924
* [TargetLowering] SimplifyDemandedBits - add EXTRACT_SUBVECTOR support.Simon Pilgrim2019-09-142-11/+22
| | | | | | Call SimplifyDemandedBits on the source vector. llvm-svn: 371923
* [lldb] Code cleanup: FormattersContainer.h: Use range-based for loops.Jan Kratochvil2019-09-141-12/+9
| | | | | | | Suggested for an other loop by Pavel Labath in: https://reviews.llvm.org/D66654#inline-605808 llvm-svn: 371922
* [InstSimplify] simplifyUnsignedRangeCheck(): handle few tautological cases ↵Roman Lebedev2019-09-142-28/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | (PR43251) Summary: This is split off from D67356, since these cases produce a constant, no real need to keep them in instcombine. Alive proofs: https://rise4fun.com/Alive/u7Fk https://rise4fun.com/Alive/4lV https://bugs.llvm.org/show_bug.cgi?id=43251 Reviewers: spatel, nikic, xbolva00 Reviewed By: spatel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67498 llvm-svn: 371921
* [clang-scan-deps] Add -M to work around -MT issue after r371918Fangrui Song2019-09-141-0/+1
| | | | | | | | | | | gcc will complain if -MT is used but neither -M nor -MM is specified: > cc1: error: to generate dependencies you must specify either -M or -MM r371918 changed our behavior to match GCC, but apparently clang-scan-deps is not happy. llvm-svn: 371920
* [Driver] Fix multiple bugs related to dependency file options: -M -MM -MD ↵Fangrui Song2019-09-143-36/+60
| | | | | | | | | | | -MMD -MT -MQ -M -o test.i => dependency file is test.d, not test.i -MM -o test.i => dependency file is test.d, not test.i -M -MMD => bogus warning -Wunused-command-line-argument -M MT dummy => -w not rendered llvm-svn: 371918
* [Driver] Improve Clang::getDependencyFileName and its tests after rC371853Fangrui Song2019-09-144-27/+18
| | | | | | | The test file name metadata-with-dots.c is confusing because -MD and -MMD have nothing to do with metadata. llvm-svn: 371917
* [ScheduleDAGMILive] Fix typo in comment.Mingjie Xing2019-09-141-1/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D67478 llvm-svn: 371916
* [Attributor][Fix] Use right type to replace expressionsJohannes Doerfert2019-09-142-3/+19
| | | | | | | | | | | | | | Summary: This should be obsolete once the functionality in D66967 is integrated. Reviewers: uenoku, sstefan1 Subscribers: hiraditya, bollu, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67231 llvm-svn: 371915
* [llvm-objcopy] Ignore -B --binary-architecture=Fangrui Song2019-09-148-72/+18
| | | | | | | | | | | | | | | | | | | | | | | GNU objcopy documents that -B is only useful with architecture-less input (i.e. "binary" or "ihex"). After D67144, -O defaults to -I, and -B is essentially a NOP. * If -O is binary/ihex, GNU objcopy ignores -B. * If -O is elf*, -B provides the e_machine field in GNU objcopy. So to convert a blob to an ELF, `-I binary -B i386:x86-64 -O elf64-x86-64` has to be specified. `-I binary -B i386:x86-64 -O elf64-x86-64` creates an ELF with its e_machine field set to EM_NONE in GNU objcopy, but a regular x86_64 ELF in elftoolchain elfcopy. Follow the elftoolchain approach (ignoring -B) to simplify code. Users that expect their command line portable should specify -B. Reviewed By: jhenderson Differential Revision: https://reviews.llvm.org/D67215 llvm-svn: 371914
* [llvm-objcopy] Default --output-target to --input-target when unspecifiedFangrui Song2019-09-146-51/+63
| | | | | | | | | | | | | | | | | | | | | Fixes PR42171. In GNU objcopy, if -O (--output-target) is not specified, the value is copied from -I (--input-target). ``` objcopy -I binary -B i386:x86-64 a.txt b # b is copied from a.txt llvm-objcopy -I binary -B i386:x86-64 a.txt b # b is an x86-64 object file ``` This patch changes our behavior to match GNU. With this change, we can delete code related to -B handling (D67215). Reviewed By: jakehehrlich Differential Revision: https://reviews.llvm.org/D67144 llvm-svn: 371913
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