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-rw-r--r--llvm/unittests/Target/AArch64/InstSizes.cpp15
-rw-r--r--llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp13
2 files changed, 15 insertions, 13 deletions
diff --git a/llvm/unittests/Target/AArch64/InstSizes.cpp b/llvm/unittests/Target/AArch64/InstSizes.cpp
index e58df0a45cc..a70f43c4379 100644
--- a/llvm/unittests/Target/AArch64/InstSizes.cpp
+++ b/llvm/unittests/Target/AArch64/InstSizes.cpp
@@ -10,7 +10,7 @@
using namespace llvm;
namespace {
-std::unique_ptr<TargetMachine> createTargetMachine() {
+std::unique_ptr<LLVMTargetMachine> createTargetMachine() {
auto TT(Triple::normalize("aarch64--"));
std::string CPU("generic");
std::string FS("");
@@ -22,8 +22,9 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
std::string Error;
const Target *TheTarget = TargetRegistry::lookupTarget(TT, Error);
- return std::unique_ptr<TargetMachine>(TheTarget->createTargetMachine(
- TT, CPU, FS, TargetOptions(), None, None, CodeGenOpt::Default));
+ return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
+ TheTarget->createTargetMachine(TT, CPU, FS, TargetOptions(), None, None,
+ CodeGenOpt::Default)));
}
std::unique_ptr<AArch64InstrInfo> createInstrInfo(TargetMachine *TM) {
@@ -37,7 +38,7 @@ std::unique_ptr<AArch64InstrInfo> createInstrInfo(TargetMachine *TM) {
/// TODO: Some of this might be useful for other architectures as well - extract
/// the platform-independent parts somewhere they can be reused.
void runChecks(
- TargetMachine *TM, AArch64InstrInfo *II, const StringRef InputIRSnippet,
+ LLVMTargetMachine *TM, AArch64InstrInfo *II, const StringRef InputIRSnippet,
const StringRef InputMIRSnippet,
std::function<void(AArch64InstrInfo &, MachineFunction &)> Checks) {
LLVMContext Context;
@@ -78,7 +79,7 @@ void runChecks(
} // anonymous namespace
TEST(InstSizes, STACKMAP) {
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
ASSERT_TRUE(TM);
std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
@@ -93,7 +94,7 @@ TEST(InstSizes, STACKMAP) {
}
TEST(InstSizes, PATCHPOINT) {
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
runChecks(TM.get(), II.get(), "",
@@ -108,7 +109,7 @@ TEST(InstSizes, PATCHPOINT) {
}
TEST(InstSizes, TLSDESC_CALLSEQ) {
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
runChecks(
diff --git a/llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp b/llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
index 599f2e7f10f..095ee0665e1 100644
--- a/llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
+++ b/llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
@@ -22,7 +22,7 @@ using namespace llvm;
namespace {
-std::unique_ptr<TargetMachine> createTargetMachine() {
+std::unique_ptr<LLVMTargetMachine> createTargetMachine() {
auto TT(Triple::normalize("wasm32-unknown-unknown"));
std::string CPU("");
std::string FS("");
@@ -35,8 +35,9 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
const Target *TheTarget = TargetRegistry::lookupTarget(TT, Error);
assert(TheTarget);
- return std::unique_ptr<TargetMachine>(TheTarget->createTargetMachine(
- TT, CPU, FS, TargetOptions(), None, None, CodeGenOpt::Default));
+ return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
+ TheTarget->createTargetMachine(TT, CPU, FS, TargetOptions(), None, None,
+ CodeGenOpt::Default)));
}
std::unique_ptr<Module> parseMIR(LLVMContext &Context,
@@ -64,7 +65,7 @@ std::unique_ptr<Module> parseMIR(LLVMContext &Context,
} // namespace
TEST(WebAssemblyExceptionInfoTest, TEST0) {
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
ASSERT_TRUE(TM);
StringRef MIRString = R"MIR(
@@ -227,7 +228,7 @@ body: |
}
TEST(WebAssemblyExceptionInfoTest, TEST1) {
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
ASSERT_TRUE(TM);
StringRef MIRString = R"MIR(
@@ -418,7 +419,7 @@ body: |
// Terminate pad test
TEST(WebAssemblyExceptionInfoTest, TEST2) {
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
ASSERT_TRUE(TM);
StringRef MIRString = R"MIR(
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