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-rw-r--r--llvm/include/llvm/CodeGen/MachineModuleInfo.h8
-rw-r--r--llvm/lib/CodeGen/MachineModuleInfo.cpp2
-rw-r--r--llvm/tools/llvm-exegesis/lib/Assembler.cpp4
-rw-r--r--llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp7
-rw-r--r--llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.h11
-rw-r--r--llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp21
-rw-r--r--llvm/unittests/MI/LiveIntervalTest.cpp11
-rw-r--r--llvm/unittests/Target/AArch64/InstSizes.cpp15
-rw-r--r--llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp13
9 files changed, 50 insertions, 42 deletions
diff --git a/llvm/include/llvm/CodeGen/MachineModuleInfo.h b/llvm/include/llvm/CodeGen/MachineModuleInfo.h
index 554e89019b7..4371420bc7a 100644
--- a/llvm/include/llvm/CodeGen/MachineModuleInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineModuleInfo.h
@@ -46,10 +46,10 @@ namespace llvm {
class BasicBlock;
class CallInst;
class Function;
-class MachineFunction;
+class LLVMTargetMachine;
class MMIAddrLabelMap;
+class MachineFunction;
class Module;
-class TargetMachine;
//===----------------------------------------------------------------------===//
/// This class can be derived from and used by targets to hold private
@@ -76,7 +76,7 @@ protected:
/// for specific use.
///
class MachineModuleInfo : public ImmutablePass {
- const TargetMachine &TM;
+ const LLVMTargetMachine &TM;
/// This is the MCContext used for the entire code generator.
MCContext Context;
@@ -145,7 +145,7 @@ class MachineModuleInfo : public ImmutablePass {
public:
static char ID; // Pass identification, replacement for typeid
- explicit MachineModuleInfo(const TargetMachine *TM = nullptr);
+ explicit MachineModuleInfo(const LLVMTargetMachine *TM = nullptr);
~MachineModuleInfo() override;
// Initialization and Finalization
diff --git a/llvm/lib/CodeGen/MachineModuleInfo.cpp b/llvm/lib/CodeGen/MachineModuleInfo.cpp
index ce556903dc0..6ef8de88f8b 100644
--- a/llvm/lib/CodeGen/MachineModuleInfo.cpp
+++ b/llvm/lib/CodeGen/MachineModuleInfo.cpp
@@ -194,7 +194,7 @@ void MMIAddrLabelMapCallbackPtr::allUsesReplacedWith(Value *V2) {
Map->UpdateForRAUWBlock(cast<BasicBlock>(getValPtr()), cast<BasicBlock>(V2));
}
-MachineModuleInfo::MachineModuleInfo(const TargetMachine *TM)
+MachineModuleInfo::MachineModuleInfo(const LLVMTargetMachine *TM)
: ImmutablePass(ID), TM(*TM),
Context(TM->getMCAsmInfo(), TM->getMCRegisterInfo(),
TM->getObjFileLowering(), nullptr, false) {
diff --git a/llvm/tools/llvm-exegesis/lib/Assembler.cpp b/llvm/tools/llvm-exegesis/lib/Assembler.cpp
index 771a6e9ad24..2e3712ce7dc 100644
--- a/llvm/tools/llvm-exegesis/lib/Assembler.cpp
+++ b/llvm/tools/llvm-exegesis/lib/Assembler.cpp
@@ -142,8 +142,10 @@ llvm::BitVector getFunctionReservedRegs(const llvm::TargetMachine &TM) {
llvm::make_unique<llvm::LLVMContext>();
std::unique_ptr<llvm::Module> Module =
createModule(Context, TM.createDataLayout());
+ // TODO: This only works for targets implementing LLVMTargetMachine.
+ const LLVMTargetMachine &LLVMTM = static_cast<const LLVMTargetMachine&>(TM);
std::unique_ptr<llvm::MachineModuleInfo> MMI =
- llvm::make_unique<llvm::MachineModuleInfo>(&TM);
+ llvm::make_unique<llvm::MachineModuleInfo>(&LLVMTM);
llvm::MachineFunction &MF =
createVoidVoidPtrMachineFunction(FunctionID, Module.get(), MMI.get());
// Saving reserved registers for client.
diff --git a/llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp b/llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
index dc2d1f9a357..0c184d37187 100644
--- a/llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
+++ b/llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
@@ -42,8 +42,9 @@ protected:
return;
TargetOptions Options;
- TM = std::unique_ptr<TargetMachine>(T->createTargetMachine(
- "AArch64", "", "", Options, None, None, CodeGenOpt::Aggressive));
+ TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
+ T->createTargetMachine("AArch64", "", "", Options, None, None,
+ CodeGenOpt::Aggressive)));
if (!TM)
return;
@@ -70,7 +71,7 @@ protected:
}
LLVMContext Context;
- std::unique_ptr<TargetMachine> TM = nullptr;
+ std::unique_ptr<LLVMTargetMachine> TM;
std::unique_ptr<Module> M;
Function *F;
std::unique_ptr<MachineFunction> MF;
diff --git a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.h b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.h
index ca1aed544d2..28af811e1f1 100644
--- a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.h
+++ b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.h
@@ -44,7 +44,7 @@ void initLLVM() {
/// Create a TargetMachine. As we lack a dedicated always available target for
/// unittests, we go for "AArch64".
-std::unique_ptr<TargetMachine> createTargetMachine() {
+std::unique_ptr<LLVMTargetMachine> createTargetMachine() {
Triple TargetTriple("aarch64--");
std::string Error;
const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
@@ -52,8 +52,9 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
return nullptr;
TargetOptions Options;
- return std::unique_ptr<TargetMachine>(T->createTargetMachine(
- "AArch64", "", "", Options, None, None, CodeGenOpt::Aggressive));
+ return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
+ T->createTargetMachine("AArch64", "", "", Options, None, None,
+ CodeGenOpt::Aggressive)));
}
std::unique_ptr<Module> parseMIR(LLVMContext &Context,
@@ -79,7 +80,7 @@ std::unique_ptr<Module> parseMIR(LLVMContext &Context,
}
std::pair<std::unique_ptr<Module>, std::unique_ptr<MachineModuleInfo>>
-createDummyModule(LLVMContext &Context, const TargetMachine &TM,
+createDummyModule(LLVMContext &Context, const LLVMTargetMachine &TM,
StringRef MIRFunc) {
SmallString<512> S;
StringRef MIRString = (Twine(R"MIR(
@@ -136,7 +137,7 @@ protected:
B.setInsertPt(*EntryMBB, EntryMBB->end());
}
LLVMContext Context;
- std::unique_ptr<TargetMachine> TM;
+ std::unique_ptr<LLVMTargetMachine> TM;
MachineFunction *MF;
std::pair<std::unique_ptr<Module>, std::unique_ptr<MachineModuleInfo>>
ModuleMMIPair;
diff --git a/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp b/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
index 8f17b1991df..1f3a690ad01 100644
--- a/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
@@ -43,7 +43,7 @@ void initLLVM() {
/// Create a TargetMachine. As we lack a dedicated always available target for
/// unittests, we go for "AArch64".
-std::unique_ptr<TargetMachine> createTargetMachine() {
+std::unique_ptr<LLVMTargetMachine> createTargetMachine() {
Triple TargetTriple("aarch64--");
std::string Error;
const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
@@ -51,8 +51,9 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
return nullptr;
TargetOptions Options;
- return std::unique_ptr<TargetMachine>(T->createTargetMachine(
- "AArch64", "", "", Options, None, None, CodeGenOpt::Aggressive));
+ return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
+ T->createTargetMachine("AArch64", "", "", Options, None, None,
+ CodeGenOpt::Aggressive)));
}
std::unique_ptr<Module> parseMIR(LLVMContext &Context,
@@ -78,7 +79,7 @@ std::unique_ptr<Module> parseMIR(LLVMContext &Context,
}
std::pair<std::unique_ptr<Module>, std::unique_ptr<MachineModuleInfo>>
-createDummyModule(LLVMContext &Context, const TargetMachine &TM,
+createDummyModule(LLVMContext &Context, const LLVMTargetMachine &TM,
StringRef MIRFunc) {
SmallString<512> S;
StringRef MIRString = (Twine(R"MIR(
@@ -122,7 +123,7 @@ static void collectCopies(SmallVectorImpl<unsigned> &Copies,
TEST(PatternMatchInstr, MatchIntConstant) {
LLVMContext Context;
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
if (!TM)
return;
auto ModuleMMIPair = createDummyModule(Context, *TM, "");
@@ -143,7 +144,7 @@ TEST(PatternMatchInstr, MatchIntConstant) {
TEST(PatternMatchInstr, MatchBinaryOp) {
LLVMContext Context;
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
if (!TM)
return;
auto ModuleMMIPair = createDummyModule(Context, *TM, "");
@@ -270,7 +271,7 @@ TEST(PatternMatchInstr, MatchBinaryOp) {
TEST(PatternMatchInstr, MatchFPUnaryOp) {
LLVMContext Context;
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
if (!TM)
return;
auto ModuleMMIPair = createDummyModule(Context, *TM, "");
@@ -341,7 +342,7 @@ TEST(PatternMatchInstr, MatchFPUnaryOp) {
TEST(PatternMatchInstr, MatchExtendsTrunc) {
LLVMContext Context;
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
if (!TM)
return;
auto ModuleMMIPair = createDummyModule(Context, *TM, "");
@@ -397,7 +398,7 @@ TEST(PatternMatchInstr, MatchExtendsTrunc) {
TEST(PatternMatchInstr, MatchSpecificType) {
LLVMContext Context;
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
if (!TM)
return;
auto ModuleMMIPair = createDummyModule(Context, *TM, "");
@@ -444,7 +445,7 @@ TEST(PatternMatchInstr, MatchSpecificType) {
TEST(PatternMatchInstr, MatchCombinators) {
LLVMContext Context;
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
if (!TM)
return;
auto ModuleMMIPair = createDummyModule(Context, *TM, "");
diff --git a/llvm/unittests/MI/LiveIntervalTest.cpp b/llvm/unittests/MI/LiveIntervalTest.cpp
index a39fd7f73cf..5ee9d13dbd9 100644
--- a/llvm/unittests/MI/LiveIntervalTest.cpp
+++ b/llvm/unittests/MI/LiveIntervalTest.cpp
@@ -35,7 +35,7 @@ void initLLVM() {
/// Create a TargetMachine. As we lack a dedicated always available target for
/// unittests, we go for "AMDGPU" to be able to test normal and subregister
/// liveranges.
-std::unique_ptr<TargetMachine> createTargetMachine() {
+std::unique_ptr<LLVMTargetMachine> createTargetMachine() {
Triple TargetTriple("amdgcn--");
std::string Error;
const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
@@ -43,13 +43,14 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
return nullptr;
TargetOptions Options;
- return std::unique_ptr<TargetMachine>(T->createTargetMachine(
- "AMDGPU", "", "", Options, None, None, CodeGenOpt::Aggressive));
+ return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
+ T->createTargetMachine("AMDGPU", "", "", Options, None, None,
+ CodeGenOpt::Aggressive)));
}
std::unique_ptr<Module> parseMIR(LLVMContext &Context,
legacy::PassManagerBase &PM, std::unique_ptr<MIRParser> &MIR,
- const TargetMachine &TM, StringRef MIRCode, const char *FuncName) {
+ const LLVMTargetMachine &TM, StringRef MIRCode, const char *FuncName) {
SMDiagnostic Diagnostic;
std::unique_ptr<MemoryBuffer> MBuffer = MemoryBuffer::getMemBuffer(MIRCode);
MIR = createMIRParser(std::move(MBuffer), Context);
@@ -128,7 +129,7 @@ static void testHandleMove(MachineFunction &MF, LiveIntervals &LIS,
static void liveIntervalTest(StringRef MIRFunc, LiveIntervalTest T) {
LLVMContext Context;
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
// This test is designed for the X86 backend; stop if it is not available.
if (!TM)
return;
diff --git a/llvm/unittests/Target/AArch64/InstSizes.cpp b/llvm/unittests/Target/AArch64/InstSizes.cpp
index e58df0a45cc..a70f43c4379 100644
--- a/llvm/unittests/Target/AArch64/InstSizes.cpp
+++ b/llvm/unittests/Target/AArch64/InstSizes.cpp
@@ -10,7 +10,7 @@
using namespace llvm;
namespace {
-std::unique_ptr<TargetMachine> createTargetMachine() {
+std::unique_ptr<LLVMTargetMachine> createTargetMachine() {
auto TT(Triple::normalize("aarch64--"));
std::string CPU("generic");
std::string FS("");
@@ -22,8 +22,9 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
std::string Error;
const Target *TheTarget = TargetRegistry::lookupTarget(TT, Error);
- return std::unique_ptr<TargetMachine>(TheTarget->createTargetMachine(
- TT, CPU, FS, TargetOptions(), None, None, CodeGenOpt::Default));
+ return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
+ TheTarget->createTargetMachine(TT, CPU, FS, TargetOptions(), None, None,
+ CodeGenOpt::Default)));
}
std::unique_ptr<AArch64InstrInfo> createInstrInfo(TargetMachine *TM) {
@@ -37,7 +38,7 @@ std::unique_ptr<AArch64InstrInfo> createInstrInfo(TargetMachine *TM) {
/// TODO: Some of this might be useful for other architectures as well - extract
/// the platform-independent parts somewhere they can be reused.
void runChecks(
- TargetMachine *TM, AArch64InstrInfo *II, const StringRef InputIRSnippet,
+ LLVMTargetMachine *TM, AArch64InstrInfo *II, const StringRef InputIRSnippet,
const StringRef InputMIRSnippet,
std::function<void(AArch64InstrInfo &, MachineFunction &)> Checks) {
LLVMContext Context;
@@ -78,7 +79,7 @@ void runChecks(
} // anonymous namespace
TEST(InstSizes, STACKMAP) {
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
ASSERT_TRUE(TM);
std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
@@ -93,7 +94,7 @@ TEST(InstSizes, STACKMAP) {
}
TEST(InstSizes, PATCHPOINT) {
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
runChecks(TM.get(), II.get(), "",
@@ -108,7 +109,7 @@ TEST(InstSizes, PATCHPOINT) {
}
TEST(InstSizes, TLSDESC_CALLSEQ) {
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
runChecks(
diff --git a/llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp b/llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
index 599f2e7f10f..095ee0665e1 100644
--- a/llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
+++ b/llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
@@ -22,7 +22,7 @@ using namespace llvm;
namespace {
-std::unique_ptr<TargetMachine> createTargetMachine() {
+std::unique_ptr<LLVMTargetMachine> createTargetMachine() {
auto TT(Triple::normalize("wasm32-unknown-unknown"));
std::string CPU("");
std::string FS("");
@@ -35,8 +35,9 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
const Target *TheTarget = TargetRegistry::lookupTarget(TT, Error);
assert(TheTarget);
- return std::unique_ptr<TargetMachine>(TheTarget->createTargetMachine(
- TT, CPU, FS, TargetOptions(), None, None, CodeGenOpt::Default));
+ return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
+ TheTarget->createTargetMachine(TT, CPU, FS, TargetOptions(), None, None,
+ CodeGenOpt::Default)));
}
std::unique_ptr<Module> parseMIR(LLVMContext &Context,
@@ -64,7 +65,7 @@ std::unique_ptr<Module> parseMIR(LLVMContext &Context,
} // namespace
TEST(WebAssemblyExceptionInfoTest, TEST0) {
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
ASSERT_TRUE(TM);
StringRef MIRString = R"MIR(
@@ -227,7 +228,7 @@ body: |
}
TEST(WebAssemblyExceptionInfoTest, TEST1) {
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
ASSERT_TRUE(TM);
StringRef MIRString = R"MIR(
@@ -418,7 +419,7 @@ body: |
// Terminate pad test
TEST(WebAssemblyExceptionInfoTest, TEST2) {
- std::unique_ptr<TargetMachine> TM = createTargetMachine();
+ std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
ASSERT_TRUE(TM);
StringRef MIRString = R"MIR(
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