diff options
Diffstat (limited to 'llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp')
-rw-r--r-- | llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp b/llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp index 599f2e7f10f..095ee0665e1 100644 --- a/llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp +++ b/llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp @@ -22,7 +22,7 @@ using namespace llvm; namespace { -std::unique_ptr<TargetMachine> createTargetMachine() { +std::unique_ptr<LLVMTargetMachine> createTargetMachine() { auto TT(Triple::normalize("wasm32-unknown-unknown")); std::string CPU(""); std::string FS(""); @@ -35,8 +35,9 @@ std::unique_ptr<TargetMachine> createTargetMachine() { const Target *TheTarget = TargetRegistry::lookupTarget(TT, Error); assert(TheTarget); - return std::unique_ptr<TargetMachine>(TheTarget->createTargetMachine( - TT, CPU, FS, TargetOptions(), None, None, CodeGenOpt::Default)); + return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>( + TheTarget->createTargetMachine(TT, CPU, FS, TargetOptions(), None, None, + CodeGenOpt::Default))); } std::unique_ptr<Module> parseMIR(LLVMContext &Context, @@ -64,7 +65,7 @@ std::unique_ptr<Module> parseMIR(LLVMContext &Context, } // namespace TEST(WebAssemblyExceptionInfoTest, TEST0) { - std::unique_ptr<TargetMachine> TM = createTargetMachine(); + std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine(); ASSERT_TRUE(TM); StringRef MIRString = R"MIR( @@ -227,7 +228,7 @@ body: | } TEST(WebAssemblyExceptionInfoTest, TEST1) { - std::unique_ptr<TargetMachine> TM = createTargetMachine(); + std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine(); ASSERT_TRUE(TM); StringRef MIRString = R"MIR( @@ -418,7 +419,7 @@ body: | // Terminate pad test TEST(WebAssemblyExceptionInfoTest, TEST2) { - std::unique_ptr<TargetMachine> TM = createTargetMachine(); + std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine(); ASSERT_TRUE(TM); StringRef MIRString = R"MIR( |