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-rw-r--r--llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir6
-rw-r--r--llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir35
-rw-r--r--llvm/test/CodeGen/MIR/X86/callee-saved-info.mir2
-rw-r--r--llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir3
-rw-r--r--llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir3
-rw-r--r--llvm/test/CodeGen/MIR/X86/stack-objects.mir9
-rw-r--r--llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir6
7 files changed, 53 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir b/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
index cfb3aef5fb0..06e0c8014b5 100644
--- a/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
+++ b/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
@@ -25,9 +25,9 @@ frameInfo:
maxAlignment: 8
# CHECK-LABEL: stack_local
# CHECK: stack:
-# CHECK-NEXT: { id: 0, name: local_var, type: default, offset: 0, size: 8, alignment: 8,
-# CHECK-NEXT: callee-saved-register: '', local-offset: -8, di-variable: '', di-expression: '',
-# CHECK-NEXT: di-location: '' }
+# CHECK: - { id: 0, name: local_var, type: default, offset: 0, size: 8, alignment: 8,
+# CHECK-NEXT: stack-id: 0, callee-saved-register: '', local-offset: -8, di-variable: '',
+# CHECK-NEXT: di-expression: '', di-location: '' }
stack:
- { id: 0,name: local_var,offset: 0,size: 8,alignment: 8, local-offset: -8 }
body: |
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir b/llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir
new file mode 100644
index 00000000000..c07c0790a1e
--- /dev/null
+++ b/llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir
@@ -0,0 +1,35 @@
+# RUN: llc -march=amdgcn -run-pass none -o - %s | FileCheck %s
+...
+---
+
+# CHECK-LABEL: name: spill_slot_stack_id
+# CHECK: {{^}}fixedStack:
+# CHECK: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4, stack-id: 0,
+# CHECK: - { id: 1, type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: 0,
+# CHECK: - { id: 2, type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: 9,
+
+# CHECK: {{^}}stack:
+# CHECK: - { id: 0, name: '', type: spill-slot, offset: 0, size: 16,
+# CHECK-NEXT: stack-id: 3,
+
+# CHECK: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8,
+# CHECK-NEXT: stack-id: 0,
+
+# CHECK: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4,
+# CHECK-NEXT: stack-id: 0,
+
+
+name: spill_slot_stack_id
+fixedStack:
+ - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: 9 }
+ - { id: 1, type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: 0 }
+ - { id: 2, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+stack:
+ - { id: 0, name: '', type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: 3 }
+ - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: 0 }
+ - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4 }
+
+body: |
+ bb.0:
+ S_ENDPGM
+...
diff --git a/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir b/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir
index 6920611019b..2a62b4e4f48 100644
--- a/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir
+++ b/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir
@@ -50,7 +50,7 @@ frameInfo:
adjustsStack: true
hasCalls: true
# CHECK: fixedStack:
-# CHECK: , callee-saved-register: '%rbx' }
+# CHECK: callee-saved-register: '%rbx' }
fixedStack:
- { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '%rbx' }
# CHECK: stack:
diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
index c87cb0b49f9..93544c426c3 100644
--- a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
@@ -20,7 +20,8 @@ frameInfo:
stackSize: 4
maxAlignment: 4
# CHECK: fixedStack:
-# CHECK-NEXT: - { id: 0, type: default, offset: 0, size: 4, alignment: 4, isImmutable: true,
+# CHECK-NEXT: - { id: 0, type: default, offset: 0, size: 4, alignment: 4, stack-id: 0
+# CHECK-NEXT: isImmutable: true,
fixedStack:
- { id: 0, offset: 0, size: 4, alignment: 4, isImmutable: true, isAliased: false }
stack:
diff --git a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
index d3c42236284..86e735e616e 100644
--- a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
@@ -19,7 +19,8 @@ name: test
frameInfo:
maxAlignment: 4
# CHECK: fixedStack:
-# CHECK-NEXT: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4, callee-saved-register: '' }
+# CHECK-NEXT: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4, stack-id: 0,
+# CHECK-NEXT: callee-saved-register: '' }
fixedStack:
- { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
stack:
diff --git a/llvm/test/CodeGen/MIR/X86/stack-objects.mir b/llvm/test/CodeGen/MIR/X86/stack-objects.mir
index 608202ec5dc..ea3e8410df4 100644
--- a/llvm/test/CodeGen/MIR/X86/stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/stack-objects.mir
@@ -22,11 +22,14 @@ frameInfo:
maxAlignment: 8
# CHECK: stack:
# CHECK-NEXT: - { id: 0, name: b, type: default, offset: -12, size: 4, alignment: 4,
-# CHECK-NEXT: callee-saved-register: '', di-variable: '', di-expression: '', di-location: '' }
+# CHECK-NEXT: stack-id: 0, callee-saved-register: '', di-variable: '', di-expression: '',
+# CHECK-NEXT: di-location: '' }
# CHECK-NEXT: - { id: 1, name: x, type: default, offset: -24, size: 8, alignment: 8,
-# CHECK-NEXT: callee-saved-register: '', di-variable: '', di-expression: '', di-location: '' }
+# CHECK-NEXT: stack-id: 0, callee-saved-register: '', di-variable: '', di-expression: '',
+# CHECK-NEXT: di-location: '' }
# CHECK-NEXT: - { id: 2, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4,
-# CHECK-NEXT: callee-saved-register: '', di-variable: '', di-expression: '', di-location: '' }
+# CHECK-NEXT: stack-id: 0, callee-saved-register: '', di-variable: '', di-expression: '',
+# CHECK-NEXT: di-location: '' }
stack:
- { id: 0, name: b, offset: -12, size: 4, alignment: 4 }
- { id: 1, name: x, offset: -24, size: 8, alignment: 8 }
diff --git a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
index 95efd977d9c..726ea87fb44 100644
--- a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
@@ -25,9 +25,11 @@ frameInfo:
adjustsStack: true
# CHECK: stack:
# CHECK-NEXT: - { id: 0, name: '', type: default, offset: -20, size: 4, alignment: 4,
-# CHECK-NEXT: callee-saved-register: '', di-variable: '', di-expression: '', di-location: '' }
+# CHECK-NEXT: stack-id: 0, callee-saved-register: '', di-variable: '', di-expression: '',
+# CHECK-NEXT: di-location: '' }
# CHECK-NEXT: - { id: 1, name: '', type: default, offset: -32, size: 8, alignment: 8,
-# CHECK-NEXT: callee-saved-register: '', di-variable: '', di-expression: '', di-location: '' }
+# CHECK-NEXT: stack-id: 0, callee-saved-register: '', di-variable: '', di-expression: '',
+# CHECK-NEXT: di-location: '' }
# CHECK-NEXT: - { id: 2, name: y, type: variable-sized, offset: -32, alignment: 1,
stack:
- { id: 0, offset: -20, size: 4, alignment: 4 }
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