diff options
Diffstat (limited to 'llvm/test/CodeGen')
11 files changed, 202 insertions, 60 deletions
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll index 10ce87c2a18..2c35e3fb669 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -11,7 +11,7 @@ target triple = "aarch64--" ; CHECK-NEXT: [[ARG2:%[0-9]+]](s64) = COPY %x1 ; CHECK-NEXT: [[RES:%[0-9]+]](s64) = G_ADD [[ARG1]], [[ARG2]] ; CHECK-NEXT: %x0 = COPY [[RES]] -; CHECK-NEXT: RET_ReallyLR implicit %x0 +; CHECK-NEXT: RET_ReallyLR implicit %x0 define i64 @addi64(i64 %arg1, i64 %arg2) { %res = add i64 %arg1, %arg2 ret i64 %res @@ -32,11 +32,14 @@ define i64 @muli64(i64 %arg1, i64 %arg2) { ; CHECK-LABEL: name: allocai64 ; CHECK: stack: ; CHECK-NEXT: - { id: 0, name: ptr1, type: default, offset: 0, size: 8, alignment: 8, -; CHECK-NEXT: callee-saved-register: '', di-variable: '', di-expression: '', di-location: '' } +; CHECK-NEXT: stack-id: 0, callee-saved-register: '', di-variable: '', di-expression: '', +; CHECK-NEXT: di-location: '' } ; CHECK-NEXT: - { id: 1, name: ptr2, type: default, offset: 0, size: 8, alignment: 1, -; CHECK-NEXT: callee-saved-register: '', di-variable: '', di-expression: '', di-location: '' } +; CHECK-NEXT: stack-id: 0, callee-saved-register: '', di-variable: '', di-expression: '', +; CHECK-NEXT: di-location: '' } ; CHECK-NEXT: - { id: 2, name: ptr3, type: default, offset: 0, size: 128, alignment: 8, -; CHECK-NEXT: callee-saved-register: '', di-variable: '', di-expression: '', di-location: '' } +; CHECK-NEXT: stack-id: 0, callee-saved-register: '', di-variable: '', di-expression: '', +; CHECK-NEXT: di-location: '' } ; CHECK-NEXT: - { id: 3, name: ptr4, type: default, offset: 0, size: 1, alignment: 8, ; CHECK: %{{[0-9]+}}(p0) = G_FRAME_INDEX %stack.0.ptr1 ; CHECK: %{{[0-9]+}}(p0) = G_FRAME_INDEX %stack.1.ptr2 diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll index 8fba8e09f9f..1cc196be359 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll @@ -208,7 +208,8 @@ define void @test_call_stack() { ; CHECK-LABEL: name: test_mem_i1 ; CHECK: fixedStack: -; CHECK-NEXT: - { id: [[SLOT:[0-9]+]], type: default, offset: 0, size: 1, alignment: 16, isImmutable: true, +; CHECK-NEXT: - { id: [[SLOT:[0-9]+]], type: default, offset: 0, size: 1, alignment: 16, stack-id: 0, +; CHECK-NEXT: isImmutable: true, ; CHECK: [[ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[SLOT]] ; CHECK: {{%[0-9]+}}(s1) = G_LOAD [[ADDR]](p0) :: (invariant load 1 from %fixed-stack.[[SLOT]], align 0) define void @test_mem_i1([8 x i64], i1 %in) { diff --git a/llvm/test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir b/llvm/test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir new file mode 100644 index 00000000000..b41e6ac6fd5 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir @@ -0,0 +1,34 @@ +# RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -stress-regalloc=1 -start-before=greedy -stop-after=stack-slot-coloring -o - %s | FileCheck %s +--- + +# CHECK-LABEL: name: no_merge_sgpr_vgpr_spill_slot{{$}} +# CHECK: stack: +# CHECK: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4, +# CHECK-NEXT: stack-id: 0, + +# CHECK: - { id: 1, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4, +# CHECK-NEXT: stack-id: 1, + +# CHECK: SI_SPILL_V32_SAVE killed %vgpr0, %stack.0, %sgpr0_sgpr1_sgpr2_sgpr3, %sgpr5, 0, implicit %exec :: (store 4 into %stack.0) +# CHECK: %vgpr0 = SI_SPILL_V32_RESTORE %stack.0, %sgpr0_sgpr1_sgpr2_sgpr3, %sgpr5, 0, implicit %exec :: (load 4 from %stack.0) + +# CHECK: SI_SPILL_S32_SAVE killed %sgpr6, %stack.1, implicit %exec, implicit %sgpr0_sgpr1_sgpr2_sgpr3, implicit %sgpr5, implicit-def dead %m0 :: (store 4 into %stack.1) +# CHECK: %sgpr6 = SI_SPILL_S32_RESTORE %stack.1, implicit %exec, implicit %sgpr0_sgpr1_sgpr2_sgpr3, implicit %sgpr5, implicit-def dead %m0 :: (load 4 from %stack.1) + +name: no_merge_sgpr_vgpr_spill_slot +tracksRegLiveness: true +registers: + - { id: 0, class: vgpr_32 } + - { id: 1, class: sreg_32_xm0_xexec } + - { id: 2, class: vgpr_32 } + - { id: 3, class: sreg_32_xm0_xexec } + +body: | + bb.0: + %0 = FLAT_LOAD_DWORD undef %vgpr0_vgpr1, 0, 0, 0, implicit %flat_scr, implicit %exec + %2 = FLAT_LOAD_DWORD undef %vgpr0_vgpr1, 0, 0, 0, implicit %flat_scr, implicit %exec + S_NOP 0, implicit %0 + %1 = S_LOAD_DWORD_IMM undef %sgpr0_sgpr1, 0, 0 + %3 = S_LOAD_DWORD_IMM undef %sgpr0_sgpr1, 0, 0 + S_NOP 0, implicit %1 +... diff --git a/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir b/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir index cfb3aef5fb0..06e0c8014b5 100644 --- a/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir +++ b/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir @@ -25,9 +25,9 @@ frameInfo: maxAlignment: 8 # CHECK-LABEL: stack_local # CHECK: stack: -# CHECK-NEXT: { id: 0, name: local_var, type: default, offset: 0, size: 8, alignment: 8, -# CHECK-NEXT: callee-saved-register: '', local-offset: -8, di-variable: '', di-expression: '', -# CHECK-NEXT: di-location: '' } +# CHECK: - { id: 0, name: local_var, type: default, offset: 0, size: 8, alignment: 8, +# CHECK-NEXT: stack-id: 0, callee-saved-register: '', local-offset: -8, di-variable: '', +# CHECK-NEXT: di-expression: '', di-location: '' } stack: - { id: 0,name: local_var,offset: 0,size: 8,alignment: 8, local-offset: -8 } body: | diff --git a/llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir b/llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir new file mode 100644 index 00000000000..c07c0790a1e --- /dev/null +++ b/llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir @@ -0,0 +1,35 @@ +# RUN: llc -march=amdgcn -run-pass none -o - %s | FileCheck %s +... +--- + +# CHECK-LABEL: name: spill_slot_stack_id +# CHECK: {{^}}fixedStack: +# CHECK: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4, stack-id: 0, +# CHECK: - { id: 1, type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: 0, +# CHECK: - { id: 2, type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: 9, + +# CHECK: {{^}}stack: +# CHECK: - { id: 0, name: '', type: spill-slot, offset: 0, size: 16, +# CHECK-NEXT: stack-id: 3, + +# CHECK: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, +# CHECK-NEXT: stack-id: 0, + +# CHECK: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, +# CHECK-NEXT: stack-id: 0, + + +name: spill_slot_stack_id +fixedStack: + - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: 9 } + - { id: 1, type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: 0 } + - { id: 2, type: spill-slot, offset: 0, size: 4, alignment: 4 } +stack: + - { id: 0, name: '', type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: 3 } + - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: 0 } + - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4 } + +body: | + bb.0: + S_ENDPGM +... diff --git a/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir b/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir index 6920611019b..2a62b4e4f48 100644 --- a/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir +++ b/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir @@ -50,7 +50,7 @@ frameInfo: adjustsStack: true hasCalls: true # CHECK: fixedStack: -# CHECK: , callee-saved-register: '%rbx' } +# CHECK: callee-saved-register: '%rbx' } fixedStack: - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '%rbx' } # CHECK: stack: diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir index c87cb0b49f9..93544c426c3 100644 --- a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir +++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir @@ -20,7 +20,8 @@ frameInfo: stackSize: 4 maxAlignment: 4 # CHECK: fixedStack: -# CHECK-NEXT: - { id: 0, type: default, offset: 0, size: 4, alignment: 4, isImmutable: true, +# CHECK-NEXT: - { id: 0, type: default, offset: 0, size: 4, alignment: 4, stack-id: 0 +# CHECK-NEXT: isImmutable: true, fixedStack: - { id: 0, offset: 0, size: 4, alignment: 4, isImmutable: true, isAliased: false } stack: diff --git a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir index d3c42236284..86e735e616e 100644 --- a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir +++ b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir @@ -19,7 +19,8 @@ name: test frameInfo: maxAlignment: 4 # CHECK: fixedStack: -# CHECK-NEXT: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4, callee-saved-register: '' } +# CHECK-NEXT: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4, stack-id: 0, +# CHECK-NEXT: callee-saved-register: '' } fixedStack: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 } stack: diff --git a/llvm/test/CodeGen/MIR/X86/stack-objects.mir b/llvm/test/CodeGen/MIR/X86/stack-objects.mir index 608202ec5dc..ea3e8410df4 100644 --- a/llvm/test/CodeGen/MIR/X86/stack-objects.mir +++ b/llvm/test/CodeGen/MIR/X86/stack-objects.mir @@ -22,11 +22,14 @@ frameInfo: maxAlignment: 8 # CHECK: stack: # CHECK-NEXT: - { id: 0, name: b, type: default, offset: -12, size: 4, alignment: 4, -# CHECK-NEXT: callee-saved-register: '', di-variable: '', di-expression: '', di-location: '' } +# CHECK-NEXT: stack-id: 0, callee-saved-register: '', di-variable: '', di-expression: '', +# CHECK-NEXT: di-location: '' } # CHECK-NEXT: - { id: 1, name: x, type: default, offset: -24, size: 8, alignment: 8, -# CHECK-NEXT: callee-saved-register: '', di-variable: '', di-expression: '', di-location: '' } +# CHECK-NEXT: stack-id: 0, callee-saved-register: '', di-variable: '', di-expression: '', +# CHECK-NEXT: di-location: '' } # CHECK-NEXT: - { id: 2, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4, -# CHECK-NEXT: callee-saved-register: '', di-variable: '', di-expression: '', di-location: '' } +# CHECK-NEXT: stack-id: 0, callee-saved-register: '', di-variable: '', di-expression: '', +# CHECK-NEXT: di-location: '' } stack: - { id: 0, name: b, offset: -12, size: 4, alignment: 4 } - { id: 1, name: x, offset: -24, size: 8, alignment: 8 } diff --git a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir index 95efd977d9c..726ea87fb44 100644 --- a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir +++ b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir @@ -25,9 +25,11 @@ frameInfo: adjustsStack: true # CHECK: stack: # CHECK-NEXT: - { id: 0, name: '', type: default, offset: -20, size: 4, alignment: 4, -# CHECK-NEXT: callee-saved-register: '', di-variable: '', di-expression: '', di-location: '' } +# CHECK-NEXT: stack-id: 0, callee-saved-register: '', di-variable: '', di-expression: '', +# CHECK-NEXT: di-location: '' } # CHECK-NEXT: - { id: 1, name: '', type: default, offset: -32, size: 8, alignment: 8, -# CHECK-NEXT: callee-saved-register: '', di-variable: '', di-expression: '', di-location: '' } +# CHECK-NEXT: stack-id: 0, callee-saved-register: '', di-variable: '', di-expression: '', +# CHECK-NEXT: di-location: '' } # CHECK-NEXT: - { id: 2, name: y, type: variable-sized, offset: -32, alignment: 1, stack: - { id: 0, offset: -20, size: 4, alignment: 4 } diff --git a/llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll b/llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll index 00aa7cf84e5..ccaf417a7d7 100644 --- a/llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll +++ b/llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll @@ -11,8 +11,12 @@ define i8 @test_i8_args_8(i8 %arg1, i8 %arg2, i8 %arg3, i8 %arg4, ; ALL-LABEL: name: test_i8_args_8 ; X64: fixedStack: -; X64: id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 1, alignment: 8, isImmutable: true, -; X64: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 1, alignment: 16, isImmutable: true, +; X64: id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 1, alignment: 8, +; X64-NEXT: isImmutable: true, + +; X64: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 1, alignment: 16, +; X64-NEXT: isImmutable: true, + ; X64: liveins: %ecx, %edi, %edx, %esi, %r8d, %r9d ; X64: [[ARG1:%[0-9]+]](s8) = COPY %edi ; X64-NEXT: %{{[0-9]+}}(s8) = COPY %esi @@ -26,14 +30,30 @@ define i8 @test_i8_args_8(i8 %arg1, i8 %arg2, i8 %arg3, i8 %arg4, ; X64-NEXT: [[ARG8:%[0-9]+]](s8) = G_LOAD [[ARG8_ADDR]](p0) :: (invariant load 1 from %fixed-stack.[[STACK8]], align 0) ; X32: fixedStack: -; X32: id: [[STACK28:[0-9]+]], type: default, offset: 28, size: 1, alignment: 4, isImmutable: true, -; X32: id: [[STACK24:[0-9]+]], type: default, offset: 24, size: 1, alignment: 8, isImmutable: true, -; X32: id: [[STACK20:[0-9]+]], type: default, offset: 20, size: 1, alignment: 4, isImmutable: true, -; X32: id: [[STACK16:[0-9]+]], type: default, offset: 16, size: 1, alignment: 16, isImmutable: true, -; X32: id: [[STACK12:[0-9]+]], type: default, offset: 12, size: 1, alignment: 4, isImmutable: true, -; X32: id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 1, alignment: 8, isImmutable: true, -; X32: id: [[STACK4:[0-9]+]], type: default, offset: 4, size: 1, alignment: 4, isImmutable: true, -; X32: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 1, alignment: 16, isImmutable: true, +; X32: id: [[STACK28:[0-9]+]], type: default, offset: 28, size: 1, alignment: 4, +; X32-NEXT: isImmutable: true, + +; X32: id: [[STACK24:[0-9]+]], type: default, offset: 24, size: 1, alignment: 8, +; X32-NEXT: isImmutable: true, + +; X32: id: [[STACK20:[0-9]+]], type: default, offset: 20, size: 1, alignment: 4, +; X32-NEXT: isImmutable: true, + +; X32: id: [[STACK16:[0-9]+]], type: default, offset: 16, size: 1, alignment: 16, +; X32-NEXT: isImmutable: true, + +; X32: id: [[STACK12:[0-9]+]], type: default, offset: 12, size: 1, alignment: 4, +; X32-NEXT: isImmutable: true, + +; X32: id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 1, alignment: 8, +;X32-NEXT: isImmutable: true, + +; X32: id: [[STACK4:[0-9]+]], type: default, offset: 4, size: 1, alignment: 4, +; X32-NEXT: isImmutable: true, + +; X32: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 1, alignment: 16, +; X32-NEXT: isImmutable: true, + ; X32: [[ARG1_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK0]] ; X32-NEXT: [[ARG1:%[0-9]+]](s8) = G_LOAD [[ARG1_ADDR]](p0) :: (invariant load 1 from %fixed-stack.[[STACK0]], align 0) ; X32-NEXT: [[ARG2_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK4]] @@ -77,8 +97,10 @@ define i32 @test_i32_args_8(i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4, ; ALL-LABEL: name: test_i32_args_8 ; X64: fixedStack: -; X64: id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 4, alignment: 8, isImmutable: true, -; X64: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 4, alignment: 16, isImmutable: true, +; X64: id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 4, alignment: 8, +; X64-NEXT: isImmutable: true, +; X64: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 4, alignment: 16, +; X64-NEXT: isImmutable: true, ; X64: liveins: %ecx, %edi, %edx, %esi, %r8d, %r9d ; X64: [[ARG1:%[0-9]+]](s32) = COPY %edi ; X64-NEXT: %{{[0-9]+}}(s32) = COPY %esi @@ -92,14 +114,29 @@ define i32 @test_i32_args_8(i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4, ; X64-NEXT: [[ARG8:%[0-9]+]](s32) = G_LOAD [[ARG8_ADDR]](p0) :: (invariant load 4 from %fixed-stack.[[STACK8]], align 0) ; X32: fixedStack: -; X32: id: [[STACK28:[0-9]+]], type: default, offset: 28, size: 4, alignment: 4, isImmutable: true, -; X32: id: [[STACK24:[0-9]+]], type: default, offset: 24, size: 4, alignment: 8, isImmutable: true, -; X32: id: [[STACK20:[0-9]+]], type: default, offset: 20, size: 4, alignment: 4, isImmutable: true, -; X32: id: [[STACK16:[0-9]+]], type: default, offset: 16, size: 4, alignment: 16, isImmutable: true, -; X32: id: [[STACK12:[0-9]+]], type: default, offset: 12, size: 4, alignment: 4, isImmutable: true, -; X32: id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 4, alignment: 8, isImmutable: true, -; X32: id: [[STACK4:[0-9]+]], type: default, offset: 4, size: 4, alignment: 4, isImmutable: true, -; X32: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 4, alignment: 16, isImmutable: true, +; X32: id: [[STACK28:[0-9]+]], type: default, offset: 28, size: 4, alignment: 4, +; X32-NEXT: isImmutable: true, + +; X32: id: [[STACK24:[0-9]+]], type: default, offset: 24, size: 4, alignment: 8 +; X32-NEXT: isImmutable: true, + +; X32: id: [[STACK20:[0-9]+]], type: default, offset: 20, size: 4, alignment: 4 +; X32-NEXT: isImmutable: true, + +; X32: id: [[STACK16:[0-9]+]], type: default, offset: 16, size: 4, alignment: 16 +; X32-NEXT: isImmutable: true, + +; X32: id: [[STACK12:[0-9]+]], type: default, offset: 12, size: 4, alignment: 4 +; X32-NEXT: isImmutable: true, + +; X32: id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 4, alignment: 8 +; X32-NEXT: isImmutable: true, + +; X32: id: [[STACK4:[0-9]+]], type: default, offset: 4, size: 4, alignment: 4 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 4, alignment: 16 +; X32-NEXT: isImmutable: true, + ; X32: [[ARG1_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK0]] ; X32-NEXT: [[ARG1:%[0-9]+]](s32) = G_LOAD [[ARG1_ADDR]](p0) :: (invariant load 4 from %fixed-stack.[[STACK0]], align 0) ; X32-NEXT: [[ARG2_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK4]] @@ -142,8 +179,10 @@ define i64 @test_i64_args_8(i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, ; ALL-LABEL: name: test_i64_args_8 ; X64: fixedStack: -; X64: id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 8, alignment: 8, isImmutable: true, -; X64: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 8, alignment: 16, isImmutable: true, +; X64: id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 8, alignment: 8, +; X64-NEXT: isImmutable: true, +; X64: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 8, alignment: 16, +; X64-NEXT: isImmutable: true, ; X64: liveins: %rcx, %rdi, %rdx, %rsi, %r8, %r9 ; X64: [[ARG1:%[0-9]+]](s64) = COPY %rdi ; X64-NEXT: %{{[0-9]+}}(s64) = COPY %rsi @@ -157,22 +196,38 @@ define i64 @test_i64_args_8(i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, ; X64-NEXT: [[ARG8:%[0-9]+]](s64) = G_LOAD [[ARG8_ADDR]](p0) :: (invariant load 8 from %fixed-stack.[[STACK8]], align 0) ; X32: fixedStack: -; X32: id: [[STACK60:[0-9]+]], type: default, offset: 60, size: 4, alignment: 4, isImmutable: true, -; X32: id: [[STACK56:[0-9]+]], type: default, offset: 56, size: 4, alignment: 8, isImmutable: true, -; X32: id: [[STACK52:[0-9]+]], type: default, offset: 52, size: 4, alignment: 4, isImmutable: true, -; X32: id: [[STACK48:[0-9]+]], type: default, offset: 48, size: 4, alignment: 16, isImmutable: true, -; X32: id: [[STACK44:[0-9]+]], type: default, offset: 44, size: 4, alignment: 4, isImmutable: true, -; X32: id: [[STACK40:[0-9]+]], type: default, offset: 40, size: 4, alignment: 8, isImmutable: true, -; X32: id: [[STACK36:[0-9]+]], type: default, offset: 36, size: 4, alignment: 4, isImmutable: true, -; X32: id: [[STACK32:[0-9]+]], type: default, offset: 32, size: 4, alignment: 16, isImmutable: true, -; X32: id: [[STACK28:[0-9]+]], type: default, offset: 28, size: 4, alignment: 4, isImmutable: true, -; X32: id: [[STACK24:[0-9]+]], type: default, offset: 24, size: 4, alignment: 8, isImmutable: true, -; X32: id: [[STACK20:[0-9]+]], type: default, offset: 20, size: 4, alignment: 4, isImmutable: true, -; X32: id: [[STACK16:[0-9]+]], type: default, offset: 16, size: 4, alignment: 16, isImmutable: true, -; X32: id: [[STACK12:[0-9]+]], type: default, offset: 12, size: 4, alignment: 4, isImmutable: true, -; X32: id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 4, alignment: 8, isImmutable: true, -; X32: id: [[STACK4:[0-9]+]], type: default, offset: 4, size: 4, alignment: 4, isImmutable: true, -; X32: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 4, alignment: 16, isImmutable: true, +; X32: id: [[STACK60:[0-9]+]], type: default, offset: 60, size: 4, alignment: 4, +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK56:[0-9]+]], type: default, offset: 56, size: 4, alignment: 8, +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK52:[0-9]+]], type: default, offset: 52, size: 4, alignment: 4 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK48:[0-9]+]], type: default, offset: 48, size: 4, alignment: 16 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK44:[0-9]+]], type: default, offset: 44, size: 4, alignment: 4 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK40:[0-9]+]], type: default, offset: 40, size: 4, alignment: 8 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK36:[0-9]+]], type: default, offset: 36, size: 4, alignment: 4 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK32:[0-9]+]], type: default, offset: 32, size: 4, alignment: 16 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK28:[0-9]+]], type: default, offset: 28, size: 4, alignment: 4 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK24:[0-9]+]], type: default, offset: 24, size: 4, alignment: 8 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK20:[0-9]+]], type: default, offset: 20, size: 4, alignment: 4 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK16:[0-9]+]], type: default, offset: 16, size: 4, alignment: 16 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK12:[0-9]+]], type: default, offset: 12, size: 4, alignment: 4 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 4, alignment: 8 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK4:[0-9]+]], type: default, offset: 4, size: 4, alignment: 4 +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 4, alignment: 16 +; X32-NEXT: isImmutable: true, ; X32: [[ARG1L_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK0]] ; X32-NEXT: [[ARG1L:%[0-9]+]](s32) = G_LOAD [[ARG1L_ADDR]](p0) :: (invariant load 4 from %fixed-stack.[[STACK0]], align 0) @@ -249,8 +304,10 @@ define float @test_float_args(float %arg1, float %arg2) { ; X64-NEXT: RET 0, implicit %xmm0 ; X32: fixedStack: -; X32: id: [[STACK4:[0-9]+]], type: default, offset: 4, size: 4, alignment: 4, isImmutable: true, -; X32: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 4, alignment: 16, isImmutable: true, +; X32: id: [[STACK4:[0-9]+]], type: default, offset: 4, size: 4, alignment: 4, +; X32-NEXT: isImmutable: true, +; X32: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 4, alignment: 16 +; X32-NEXT: isImmutable: true, ; X32: [[ARG1_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK0]] ; X32-NEXT: [[ARG1:%[0-9]+]](s32) = G_LOAD [[ARG1_ADDR:%[0-9]+]](p0) :: (invariant load 4 from %fixed-stack.[[STACK0]], align 0) ; X32-NEXT: [[ARG2_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK4]] @@ -270,8 +327,12 @@ define double @test_double_args(double %arg1, double %arg2) { ; X64-NEXT: RET 0, implicit %xmm0 ; X32: fixedStack: -; X32: id: [[STACK4:[0-9]+]], type: default, offset: 8, size: 8, alignment: 8, isImmutable: true, -; X32: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 8, alignment: 16, isImmutable: true, +; X32: id: [[STACK4:[0-9]+]], type: default, offset: 8, size: 8, alignment: 8, +; X32-NEXT: isImmutable: true, + +; X32: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 8, alignment: 16, +; X32-NEXT: isImmutable: true, + ; X32: [[ARG1_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK0]] ; X32-NEXT: [[ARG1:%[0-9]+]](s64) = G_LOAD [[ARG1_ADDR:%[0-9]+]](p0) :: (invariant load 8 from %fixed-stack.[[STACK0]], align 0) ; X32-NEXT: [[ARG2_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK4]] @@ -322,11 +383,12 @@ define i32 * @test_memop_i32(i32 * %p1) { ;X64-NEXT: RET 0, implicit %rax ;X32: fixedStack: -;X32: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 4, alignment: 16, isImmutable: true, +;X32: id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 4, alignment: 16, +;X32-NEXT: isImmutable: true, ;X32: %1(p0) = G_FRAME_INDEX %fixed-stack.[[STACK0]] ;X32-NEXT: %0(p0) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.[[STACK0]], align 0) ;X32-NEXT: %eax = COPY %0(p0) ;X32-NEXT: RET 0, implicit %eax ret i32 * %p1; -}
\ No newline at end of file +} |
