diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll | 8 |
3 files changed, 9 insertions, 9 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll b/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll index 1fb386cd4cd..b0ee7f323f3 100644 --- a/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll +++ b/llvm/test/CodeGen/AMDGPU/branch-relaxation.ll @@ -441,7 +441,7 @@ endif: ; GCN-NEXT: s_xor_b64 exec, exec, [[TEMP_MASK1]] ; GCN-NEXT: ; mask branch [[RET:BB[0-9]+_[0-9]+]] -; GCN: [[LOOP_BODY:BB[0-9]+_[0-9]+]]: ; %loop_body +; GCN: [[LOOP_BODY:BB[0-9]+_[0-9]+]]: ; %loop ; GCN: ;;#ASMSTART ; GCN: v_nop_e64 ; GCN: v_nop_e64 @@ -452,7 +452,7 @@ endif: ; GCN: ;;#ASMEND ; GCN: s_cbranch_vccz [[RET]] -; GCN-NEXT: [[LONGBB:BB[0-9]+_[0-9]+]]: ; %loop_body +; GCN-NEXT: [[LONGBB:BB[0-9]+_[0-9]+]]: ; %loop ; GCN-NEXT: ; in Loop: Header=[[LOOP_BODY]] Depth=1 ; GCN-NEXT: s_getpc_b64 vcc ; GCN-NEXT: s_sub_u32 vcc_lo, vcc_lo, ([[LONGBB]]+4)-[[LOOP_BODY]] diff --git a/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll b/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll index e198abf77d1..8489a785310 100644 --- a/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll +++ b/llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll @@ -59,12 +59,12 @@ ; GCN-LABEL: {{^}}reduced_nested_loop_conditions: -; GCN: s_cmp_eq_u32 s{{[0-9]+}}, 1 -; GCN-NEXT: s_cbranch_scc1 +; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 1 +; GCN-NEXT: s_cbranch_scc0 ; FIXME: Should fold to unconditional branch? ; GCN: ; implicit-def -; GCN: s_cbranch_vccz +; GCN: s_cbranch_vccnz ; GCN: ds_read_b32 diff --git a/llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll b/llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll index 1f915662ac0..7e7f6fc5e6d 100644 --- a/llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll +++ b/llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll @@ -89,11 +89,11 @@ declare float @llvm.fabs.f32(float) nounwind readnone ; This broke the old AMDIL cfg structurizer ; FUNC-LABEL: {{^}}loop_land_info_assert: -; SI: s_cmp_gt_i32 -; SI-NEXT: s_cbranch_scc0 [[ENDPGM:BB[0-9]+_[0-9]+]] +; SI: s_cmp_lt_i32 +; SI-NEXT: s_cbranch_scc1 [[ENDPGM:BB[0-9]+_[0-9]+]] -; SI: s_cmpk_gt_i32 -; SI-NEXT: s_cbranch_scc1 [[ENDPGM]] +; SI: s_cmpk_lt_i32 +; SI-NEXT: s_cbranch_scc0 [[ENDPGM]] ; SI: [[INFLOOP:BB[0-9]+_[0-9]+]] ; SI: s_cbranch_vccnz [[INFLOOP]] |
