diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll | 33 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/shl_add_constant.ll | 2 |
2 files changed, 34 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll b/llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll new file mode 100644 index 00000000000..fc2834effb1 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll @@ -0,0 +1,33 @@ +; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck %s + +; Test for a bug where DAGCombiner::ReassociateOps() was creating adds +; with offset in the first operand and base pointers in the second. + +; CHECK-LABEL: {{^}}store_same_base_ptr: +; CHECK: buffer_store_dword v{{[0-9]+}}, [[VADDR:v\[[0-9]+:[0-9]+\]]], [[SADDR:s\[[0-9]+:[0-9]+\]]] +; CHECK: buffer_store_dword v{{[0-9]+}}, [[VADDR]], [[SADDR]] +; CHECK: buffer_store_dword v{{[0-9]+}}, [[VADDR]], [[SADDR]] +; CHECK: buffer_store_dword v{{[0-9]+}}, [[VADDR]], [[SADDR]] + +define void @store_same_base_ptr(i32 addrspace(1)* %out) { +entry: + %id = call i32 @llvm.amdgcn.workitem.id.x() #0 + %offset = sext i32 %id to i64 + %offset0 = add i64 %offset, 1027 + %ptr0 = getelementptr i32, i32 addrspace(1)* %out, i64 %offset0 + store i32 3, i32 addrspace(1)* %ptr0 + %offset1 = add i64 %offset, 1026 + %ptr1 = getelementptr i32, i32 addrspace(1)* %out, i64 %offset1 + store i32 2, i32 addrspace(1)* %ptr1 + %offset2 = add i64 %offset, 1025 + %ptr2 = getelementptr i32, i32 addrspace(1)* %out, i64 %offset2 + store i32 1, i32 addrspace(1)* %ptr2 + %offset3 = add i64 %offset, 1024 + %ptr3 = getelementptr i32, i32 addrspace(1)* %out, i64 %offset3 + store i32 0, i32 addrspace(1)* %ptr3 + ret void +} + +declare i32 @llvm.amdgcn.workitem.id.x() #0 + +attributes #0 = { nounwind readnone } diff --git a/llvm/test/CodeGen/AMDGPU/shl_add_constant.ll b/llvm/test/CodeGen/AMDGPU/shl_add_constant.ll index ec17dbaaced..b1a3f8fbdc6 100644 --- a/llvm/test/CodeGen/AMDGPU/shl_add_constant.ll +++ b/llvm/test/CodeGen/AMDGPU/shl_add_constant.ll @@ -73,7 +73,7 @@ define void @test_add_shl_add_constant(i32 addrspace(1)* %out, i32 %x, i32 %y) # ; SI-DAG: s_load_dword [[X:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb ; SI-DAG: s_load_dword [[Y:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc ; SI: s_lshl_b32 [[SHL3:s[0-9]+]], [[X]], 3 -; SI: s_add_i32 [[TMP:s[0-9]+]], [[SHL3]], [[Y]] +; SI: s_add_i32 [[TMP:s[0-9]+]], [[Y]], [[SHL3]] ; SI: s_add_i32 [[RESULT:s[0-9]+]], [[TMP]], 0x3d8 ; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[RESULT]] ; SI: buffer_store_dword [[VRESULT]] |
