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| author | Oliver Stannard <oliver.stannard@arm.com> | 2018-09-27 13:41:14 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2018-09-27 13:41:14 +0000 |
| commit | 382c935c4231eaf7b820cb207c9fbd0c50505181 (patch) | |
| tree | 81ba99a637c7e3d276a3412ccfb615ca47adc7d1 /llvm/test/MC/Disassembler | |
| parent | 7860c5fe4e80970101f3f4901a673d6c47a532bb (diff) | |
| download | bcm5719-llvm-382c935c4231eaf7b820cb207c9fbd0c50505181.tar.gz bcm5719-llvm-382c935c4231eaf7b820cb207c9fbd0c50505181.zip | |
[ARM][v8.5A] Add speculation barrier to ARM & Thumb instruction sets
This is a new barrier which limits speculative execution of the
instructions following it.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52477
llvm-svn: 343213
Diffstat (limited to 'llvm/test/MC/Disassembler')
| -rw-r--r-- | llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl-thumb.txt | 9 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl.txt | 9 |
2 files changed, 18 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl-thumb.txt b/llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl-thumb.txt new file mode 100644 index 00000000000..5703408b130 --- /dev/null +++ b/llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl-thumb.txt @@ -0,0 +1,9 @@ +# RUN: llvm-mc -triple=thumbv8 -mattr=+specctrl -disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple=thumbv8 -mattr=+v8.5a -disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple=thumbv8 -mattr=-specctrl -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOSB + +0xbf 0xf3 0x70 0x8f + +# CHECK: sb +# NOSB: invalid instruction encoding +# NOSB-NEXT: 0xbf 0xf3 0x70 0x8f diff --git a/llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl.txt b/llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl.txt new file mode 100644 index 00000000000..f9d8b5397ad --- /dev/null +++ b/llvm/test/MC/Disassembler/ARM/armv8.5a-specctrl.txt @@ -0,0 +1,9 @@ +# RUN: llvm-mc -triple=armv8 -mattr=+specctrl -disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple=armv8 -mattr=+v8.5a -disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple=armv8 -mattr=-specctrl -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOSB + +0x70 0xf0 0x7f 0xf5 + +# CHECK: sb +# NOSB: invalid instruction encoding +# NOSB-NEXT: 0x70 0xf0 0x7f 0xf5 |
