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| author | Evan Cheng <evan.cheng@apple.com> | 2012-10-24 19:53:01 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2012-10-24 19:53:01 +0000 |
| commit | 59ed7d45a6e77dfbe24b880520d828580df62362 (patch) | |
| tree | bb06cc9a2f0f8a8bf0dc049a50b3723909ae3e84 /llvm/test/CodeGen/Thumb2 | |
| parent | 30bd9346a0b5b2f4b2a2032a447239d9aa3c85ef (diff) | |
| download | bcm5719-llvm-59ed7d45a6e77dfbe24b880520d828580df62362.tar.gz bcm5719-llvm-59ed7d45a6e77dfbe24b880520d828580df62362.zip | |
Fix a miscompilation caused by a typo. When turning a adde with negative value
into a sbc with a positive number, the immediate should be complemented, not
negated. Also added a missing pattern for ARM codegen.
rdar://12559385
llvm-svn: 166613
Diffstat (limited to 'llvm/test/CodeGen/Thumb2')
| -rw-r--r-- | llvm/test/CodeGen/Thumb2/carry.ll | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Thumb2/carry.ll b/llvm/test/CodeGen/Thumb2/carry.ll index de6f6e260de..85b4370fa59 100644 --- a/llvm/test/CodeGen/Thumb2/carry.ll +++ b/llvm/test/CodeGen/Thumb2/carry.ll @@ -20,3 +20,16 @@ entry: %tmp2 = sub i64 %tmp1, %b ret i64 %tmp2 } + +; rdar://12559385 +define i64 @f3(i32 %vi) { +entry: +; CHECK: f3: +; CHECK: movw [[REG:r[0-9]+]], #36102 +; CHECK: sbcs r{{[0-9]+}}, [[REG]] + %v0 = zext i32 %vi to i64 + %v1 = xor i64 %v0, -155057456198619 + %v4 = add i64 %v1, 155057456198619 + %v5 = add i64 %v4, %v1 + ret i64 %v5 +} |
