From 59ed7d45a6e77dfbe24b880520d828580df62362 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 24 Oct 2012 19:53:01 +0000 Subject: Fix a miscompilation caused by a typo. When turning a adde with negative value into a sbc with a positive number, the immediate should be complemented, not negated. Also added a missing pattern for ARM codegen. rdar://12559385 llvm-svn: 166613 --- llvm/test/CodeGen/Thumb2/carry.ll | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'llvm/test/CodeGen/Thumb2') diff --git a/llvm/test/CodeGen/Thumb2/carry.ll b/llvm/test/CodeGen/Thumb2/carry.ll index de6f6e260de..85b4370fa59 100644 --- a/llvm/test/CodeGen/Thumb2/carry.ll +++ b/llvm/test/CodeGen/Thumb2/carry.ll @@ -20,3 +20,16 @@ entry: %tmp2 = sub i64 %tmp1, %b ret i64 %tmp2 } + +; rdar://12559385 +define i64 @f3(i32 %vi) { +entry: +; CHECK: f3: +; CHECK: movw [[REG:r[0-9]+]], #36102 +; CHECK: sbcs r{{[0-9]+}}, [[REG]] + %v0 = zext i32 %vi to i64 + %v1 = xor i64 %v0, -155057456198619 + %v4 = add i64 %v1, 155057456198619 + %v5 = add i64 %v4, %v1 + ret i64 %v5 +} -- cgit v1.2.3