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authorDaniel Cederman <cederman@gaisler.com>2018-04-20 07:47:12 +0000
committerDaniel Cederman <cederman@gaisler.com>2018-04-20 07:47:12 +0000
commitc67b3ffba743e8de1c46b5363bf9801e20da5744 (patch)
tree979ecf1dd7213bd074d3e34bbe66ceca783ac2a8 /llvm/test/CodeGen/SPARC/inlineasm.ll
parent2473183c15a2396a307c6f8fdc921608185a8a5a (diff)
downloadbcm5719-llvm-c67b3ffba743e8de1c46b5363bf9801e20da5744.tar.gz
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[Sparc] Use synthetic instruction clr to zero register instead of sethi
Using `clr reg`/`mov %g0, reg`/`or %g0, %g0, reg` to zero a register looks much better than `sethi 0, reg`. Reviewers: jyknight, venkatra Reviewed By: jyknight Subscribers: eraman, fedor.sergeev, jrtc27, llvm-commits Differential Revision: https://reviews.llvm.org/D45810 llvm-svn: 330396
Diffstat (limited to 'llvm/test/CodeGen/SPARC/inlineasm.ll')
-rw-r--r--llvm/test/CodeGen/SPARC/inlineasm.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/SPARC/inlineasm.ll b/llvm/test/CodeGen/SPARC/inlineasm.ll
index d4584f8d230..7bf0f74d948 100644
--- a/llvm/test/CodeGen/SPARC/inlineasm.ll
+++ b/llvm/test/CodeGen/SPARC/inlineasm.ll
@@ -84,7 +84,7 @@ attributes #0 = { "no-frame-pointer-elim"="true" }
;; Ensures that tied in and out gets allocated properly.
; CHECK-LABEL: test_i64_inout:
-; CHECK: sethi 0, %o2
+; CHECK: mov %g0, %o2
; CHECK: mov 5, %o3
; CHECK: xor %o2, %g0, %o2
; CHECK: mov %o2, %o0
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