From c67b3ffba743e8de1c46b5363bf9801e20da5744 Mon Sep 17 00:00:00 2001 From: Daniel Cederman Date: Fri, 20 Apr 2018 07:47:12 +0000 Subject: [Sparc] Use synthetic instruction clr to zero register instead of sethi Using `clr reg`/`mov %g0, reg`/`or %g0, %g0, reg` to zero a register looks much better than `sethi 0, reg`. Reviewers: jyknight, venkatra Reviewed By: jyknight Subscribers: eraman, fedor.sergeev, jrtc27, llvm-commits Differential Revision: https://reviews.llvm.org/D45810 llvm-svn: 330396 --- llvm/test/CodeGen/SPARC/inlineasm.ll | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/test/CodeGen/SPARC/inlineasm.ll') diff --git a/llvm/test/CodeGen/SPARC/inlineasm.ll b/llvm/test/CodeGen/SPARC/inlineasm.ll index d4584f8d230..7bf0f74d948 100644 --- a/llvm/test/CodeGen/SPARC/inlineasm.ll +++ b/llvm/test/CodeGen/SPARC/inlineasm.ll @@ -84,7 +84,7 @@ attributes #0 = { "no-frame-pointer-elim"="true" } ;; Ensures that tied in and out gets allocated properly. ; CHECK-LABEL: test_i64_inout: -; CHECK: sethi 0, %o2 +; CHECK: mov %g0, %o2 ; CHECK: mov 5, %o3 ; CHECK: xor %o2, %g0, %o2 ; CHECK: mov %o2, %o0 -- cgit v1.2.3