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| author | Florian Hahn <florian.hahn@arm.com> | 2017-08-09 13:53:28 +0000 |
|---|---|---|
| committer | Florian Hahn <florian.hahn@arm.com> | 2017-08-09 13:53:28 +0000 |
| commit | fc4b3951e95323014c8f616726fe328f57d4aa05 (patch) | |
| tree | 603334ca3e665affa475419dcd7efc25042971b4 /llvm/test/CodeGen/ARM | |
| parent | d9017cc65e6f765072b11eb11828714792ae16ff (diff) | |
| download | bcm5719-llvm-fc4b3951e95323014c8f616726fe328f57d4aa05.tar.gz bcm5719-llvm-fc4b3951e95323014c8f616726fe328f57d4aa05.zip | |
[ARM] Remove FeatureNoARM implies ModeThumb.
Summary:
By removing FeatureNoARM implies ModeThumb, we can detect cases where a
function's target-features contain -thumb-mode (enables ARM codegen for the
function), but the architecture does not support ARM mode. Previously, the
implication caused the FeatureNoARM bit to be cleared for functions with
-thumb-mode, making the assertion in ARMSubtarget::ARMSubtarget [1]
pointless for such functions.
This assertion is the only guard against generating ARM code for
architectures without ARM codegen support. Is there a place where we
could easily generate error messages for the user? At the moment, we
would generate ARM code for Thumb-only architectures. X86 has the same
behavior as ARM, as in it only has an assertion and no error message,
but I think for ARM an error message would be helpful. What do you
think?
For the example below, `llc -mtriple=armv7m-eabi test.ll -o -` will
generate ARM assembler (or fail with an assertion error with this patch).
Note that if we run the resulting assembler through llvm-mc, we get
an appropriate error message, but not when codegen is handled
through clang.
```
define void @bar() #0 {
entry:
ret void
}
attributes #0 = { "target-features"="-thumb-mode" }
```
[1] https://github.com/llvm-mirror/llvm/blob/c1f7b54cef62e9c8aa745d40bea146a167bf844e/lib/Target/ARM/ARMSubtarget.cpp#L147
Reviewers: t.p.northover, rengolin, peter.smith, aadg, silviu.baranga, richard.barton.arm, echristo
Reviewed By: rengolin, echristo
Subscribers: efriedma, aemerson, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D35569
llvm-svn: 310476
Diffstat (limited to 'llvm/test/CodeGen/ARM')
| -rw-r--r-- | llvm/test/CodeGen/ARM/scavenging.mir | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/scavenging.mir b/llvm/test/CodeGen/ARM/scavenging.mir index 09040a3bd21..dfd02fbee75 100644 --- a/llvm/test/CodeGen/ARM/scavenging.mir +++ b/llvm/test/CodeGen/ARM/scavenging.mir @@ -1,4 +1,4 @@ -# RUN: llc -o - %s -mtriple=arm-arm-none-eabi -mcpu=cortex-m0 -run-pass scavenger-test | FileCheck %s +# RUN: llc -o - %s -mtriple=thumb-arm-none-eabi -mcpu=cortex-m0 -run-pass scavenger-test | FileCheck %s --- # CHECK-LABEL: name: scavengebug0 # Make sure we are not spilling/using a physreg used in the very last |

