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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-07 19:10:43 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-07 19:10:43 +0000 |
| commit | 09ec6918bc737bd3193e3cb1f7b65611ee85facb (patch) | |
| tree | 44452d81deb0e0586f0cfe6935b893dabc26e128 /llvm/test/CodeGen/AMDGPU/GlobalISel | |
| parent | 0b2ea91d6d162c3d5af824729ff3f925d163f8ac (diff) | |
| download | bcm5719-llvm-09ec6918bc737bd3193e3cb1f7b65611ee85facb.tar.gz bcm5719-llvm-09ec6918bc737bd3193e3cb1f7b65611ee85facb.zip | |
AMDGPU/GlobalISel: Select VALU G_AMDGPU_FFBH_U32
llvm-svn: 373944
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/GlobalISel')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir index cefd876daa8..026b6648af8 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py -# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 %s -o - | FileCheck %s +# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --- @@ -36,9 +36,9 @@ body: | ; CHECK-LABEL: name: ffbh_u32_s32_v_v ; CHECK: liveins: $vgpr0 - ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 - ; CHECK: [[AMDGPU_FFBH_U32_:%[0-9]+]]:vgpr(s32) = G_AMDGPU_FFBH_U32 [[COPY]](s32) - ; CHECK: S_ENDPGM 0, implicit [[AMDGPU_FFBH_U32_]](s32) + ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 + ; CHECK: [[V_FFBH_U32_e64_:%[0-9]+]]:vgpr_32 = V_FFBH_U32_e64 [[COPY]], implicit $exec + ; CHECK: S_ENDPGM 0, implicit [[V_FFBH_U32_e64_]] %0:vgpr(s32) = COPY $vgpr0 %1:vgpr(s32) = G_AMDGPU_FFBH_U32 %0 S_ENDPGM 0, implicit %1 @@ -58,9 +58,9 @@ body: | ; CHECK-LABEL: name: ffbh_u32_v_s ; CHECK: liveins: $sgpr0 - ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 - ; CHECK: [[AMDGPU_FFBH_U32_:%[0-9]+]]:vgpr(s32) = G_AMDGPU_FFBH_U32 [[COPY]](s32) - ; CHECK: S_ENDPGM 0, implicit [[AMDGPU_FFBH_U32_]](s32) + ; CHECK: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0 + ; CHECK: [[V_FFBH_U32_e64_:%[0-9]+]]:vgpr_32 = V_FFBH_U32_e64 [[COPY]], implicit $exec + ; CHECK: S_ENDPGM 0, implicit [[V_FFBH_U32_e64_]] %0:sgpr(s32) = COPY $sgpr0 %1:vgpr(s32) = G_AMDGPU_FFBH_U32 %0 S_ENDPGM 0, implicit %1 |
