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authorTim Northover <tnorthover@apple.com>2016-03-10 23:02:21 +0000
committerTim Northover <tnorthover@apple.com>2016-03-10 23:02:21 +0000
commit6092de50750e85b6866950884512ba281d431391 (patch)
tree191ce722dd6e8f2cb09445b6e4a8a4630fee37ea /llvm/test/CodeGen/AArch64
parent416ad130eab2047e64fa1be7ab5f60a6caad7cb9 (diff)
downloadbcm5719-llvm-6092de50750e85b6866950884512ba281d431391.tar.gz
bcm5719-llvm-6092de50750e85b6866950884512ba281d431391.zip
AArch64: only try to use scaled fcvt ops on legal vector types.
Before we ended up calling getSimpleVectorType on a <3 x float>, which asserted. llvm-svn: 263169
Diffstat (limited to 'llvm/test/CodeGen/AArch64')
-rw-r--r--llvm/test/CodeGen/AArch64/fcvt_combine.ll8
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/fcvt_combine.ll b/llvm/test/CodeGen/AArch64/fcvt_combine.ll
index 093ce4a4cd8..5644fa28533 100644
--- a/llvm/test/CodeGen/AArch64/fcvt_combine.ll
+++ b/llvm/test/CodeGen/AArch64/fcvt_combine.ll
@@ -152,3 +152,11 @@ define <2 x i32> @test14(<2 x float> %f) {
%vcvt.i = fptosi <2 x float> %mul.i to <2 x i32>
ret <2 x i32> %vcvt.i
}
+
+; CHECK-LABEL: test_illegal_fp_to_int:
+; CHECK: fcvtzs.4s v0, v0, #2
+define <3 x i32> @test_illegal_fp_to_int(<3 x float> %in) {
+ %scale = fmul <3 x float> %in, <float 4.0, float 4.0, float 4.0>
+ %val = fptosi <3 x float> %scale to <3 x i32>
+ ret <3 x i32> %val
+}
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