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| author | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2017-03-15 14:50:43 +0000 |
|---|---|---|
| committer | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2017-03-15 14:50:43 +0000 |
| commit | e72e1ba43419429104c620554397d4fb9917f0dc (patch) | |
| tree | 1803173a11cc0d30cc45b78ecc826a6c7052e555 /llvm/lib/Target | |
| parent | 6778b8f7155d562c9808e9b91fdaeebbccb38a19 (diff) | |
| download | bcm5719-llvm-e72e1ba43419429104c620554397d4fb9917f0dc.tar.gz bcm5719-llvm-e72e1ba43419429104c620554397d4fb9917f0dc.zip | |
Revert "[Thumb1] Fix the bug when adding/subtracting -2147483648"
This reverts r297820 which apparently fails on A15 hosts.
llvm-svn: 297842
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index a13ef5820bf..15ae0c7940b 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -9788,8 +9788,8 @@ static SDValue PerformAddcSubcCombine(SDNode *N, SelectionDAG &DAG, if (Subtarget->isThumb1Only()) { SDValue RHS = N->getOperand(1); if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(RHS)) { - int32_t imm = C->getSExtValue(); - if (-imm > 0) { + int64_t imm = C->getSExtValue(); + if (imm < 0) { SDLoc DL(N); RHS = DAG.getConstant(-imm, DL, MVT::i32); unsigned Opcode = (N->getOpcode() == ARMISD::ADDC) ? ARMISD::SUBC @@ -9806,8 +9806,8 @@ static SDValue PerformAddeSubeCombine(SDNode *N, SelectionDAG &DAG, if (Subtarget->isThumb1Only()) { SDValue RHS = N->getOperand(1); if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(RHS)) { - int32_t imm = C->getSExtValue(); - if (-imm > 0) { + int64_t imm = C->getSExtValue(); + if (imm < 0) { SDLoc DL(N); // The with-carry-in form matches bitwise not instead of the negation. |
