For PR950:

Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
   type of an function parameter was used to determine whether it should
   be sign extended or zero extended before the call. This information is
   now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
   the parameter attribute information. Although it would have been
   convenient to pass in the FunctionType itself, there isn't always one
   present in the caller. Consequently, a signedness indication for the
   result type and for each parameter was provided for in the interface
   to this method. All implementations were changed to make the adjustment
   necessary.

llvm-svn: 32788

11 files changed, 103 insertions, 136 deletions

diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 59b84193e0d..3a8bfdb5005 100644
--- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -915,7 +915,7 @@ bool ARMDAGToDAGISel::SelectAddrMode1(SDOperand Op,
         SDOperand C = CurDAG->getTargetConstant(~val,  MVT::i32);
         n           = CurDAG->getTargetNode(ARM::MVN,  MVT::i32, C, Z, Z);
      } else {
-        Constant    *C = ConstantInt::get(Type::UIntTy, val);
+        Constant    *C = ConstantInt::get(Type::Int32Ty, val);
         int  alignment = 2;
         SDOperand Addr = CurDAG->getTargetConstantPool(C, MVT::i32, alignment);
         n              = CurDAG->getTargetNode(ARM::LDR,  MVT::i32, Addr, Z);
diff --git a/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
index 14790456599..9881ac3405f 100644
--- a/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
@@ -322,7 +322,7 @@ SDNode *AlphaDAGToDAGISel::Select(SDOperand Op) {
       //	val32 >= IMM_LOW  + IMM_LOW  * IMM_MULT) //always true
       break; //(zext (LDAH (LDA)))
     //Else use the constant pool
-    ConstantInt *C = ConstantInt::get(Type::ULongTy, uval);
+    ConstantInt *C = ConstantInt::get(Type::Int64Ty, uval);
     SDOperand CPI = CurDAG->getTargetConstantPool(C, MVT::i64);
     SDNode *Tmp = CurDAG->getTargetNode(Alpha::LDAHr, MVT::i64, CPI,
                                         getGlobalBaseReg());
diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
index 3ea4e88ac4b..623ef5c13eb 100644
--- a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -317,8 +317,8 @@ static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) {
 }
 
 std::pair<SDOperand, SDOperand>
-AlphaTargetLowering::LowerCallTo(SDOperand Chain,
-                                 const Type *RetTy, bool isVarArg,
+AlphaTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, 
+                                 bool RetTyIsSigned, bool isVarArg,
                                  unsigned CallingConv, bool isTailCall,
                                  SDOperand Callee, ArgListTy &Args,
                                  SelectionDAG &DAG) {
@@ -331,7 +331,7 @@ AlphaTargetLowering::LowerCallTo(SDOperand Chain,
   std::vector<SDOperand> args_to_use;
   for (unsigned i = 0, e = Args.size(); i != e; ++i)
   {
-    switch (getValueType(Args[i].second)) {
+    switch (getValueType(Args[i].Ty)) {
     default: assert(0 && "Unexpected ValueType for argument!");
     case MVT::i1:
     case MVT::i8:
@@ -339,17 +339,17 @@ AlphaTargetLowering::LowerCallTo(SDOperand Chain,
     case MVT::i32:
       // Promote the integer to 64 bits.  If the input type is signed use a
       // sign extend, otherwise use a zero extend.
-      if (Args[i].second->isSigned())
-        Args[i].first = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Args[i].first);
+      if (Args[i].isSigned)
+        Args[i].Node = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Args[i].Node);
       else
-        Args[i].first = DAG.getNode(ISD::ZERO_EXTEND, MVT::i64, Args[i].first);
+        Args[i].Node = DAG.getNode(ISD::ZERO_EXTEND, MVT::i64, Args[i].Node);
       break;
     case MVT::i64:
     case MVT::f64:
     case MVT::f32:
       break;
     }
-    args_to_use.push_back(Args[i].first);
+    args_to_use.push_back(Args[i].Node);
   }
 
   std::vector<MVT::ValueType> RetVals;
@@ -373,7 +373,7 @@ AlphaTargetLowering::LowerCallTo(SDOperand Chain,
   SDOperand RetVal = TheCall;
 
   if (RetTyVT != ActualRetTyVT) {
-    RetVal = DAG.getNode(RetTy->isSigned() ? ISD::AssertSext : ISD::AssertZext,
+    RetVal = DAG.getNode(RetTyIsSigned ? ISD::AssertSext : ISD::AssertZext,
                          MVT::i64, RetVal, DAG.getValueType(RetTyVT));
     RetVal = DAG.getNode(ISD::TRUNCATE, RetTyVT, RetVal);
   }
diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.h b/llvm/lib/Target/Alpha/AlphaISelLowering.h
index 0c1db073ee9..d74b348d24a 100644
--- a/llvm/lib/Target/Alpha/AlphaISelLowering.h
+++ b/llvm/lib/Target/Alpha/AlphaISelLowering.h
@@ -77,9 +77,9 @@ namespace llvm {
     /// LowerCallTo - This hook lowers an abstract call to a function into an
     /// actual call.
     virtual std::pair<SDOperand, SDOperand>
-    LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, unsigned CC,
-                bool isTailCall, SDOperand Callee, ArgListTy &Args,
-                SelectionDAG &DAG);
+    LowerCallTo(SDOperand Chain, const Type *RetTy, bool RetTyIsSigned, 
+                bool isVarArg, unsigned CC, bool isTailCall, SDOperand Callee, 
+                ArgListTy &Args, SelectionDAG &DAG);
 
     ConstraintType getConstraintType(char ConstraintLetter) const;
 
diff --git a/llvm/lib/Target/CBackend/Writer.cpp b/llvm/lib/Target/CBackend/Writer.cpp
index af56e26f9ea..bb9f801b8af 100644
--- a/llvm/lib/Target/CBackend/Writer.cpp
+++ b/llvm/lib/Target/CBackend/Writer.cpp
@@ -365,17 +365,13 @@ CWriter::printPrimitiveType(std::ostream &Out, const Type *Ty, bool isSigned,
   switch (Ty->getTypeID()) {
   case Type::VoidTyID:   return Out << "void "               << NameSoFar;
   case Type::BoolTyID:   return Out << "bool "               << NameSoFar;
-  case Type::UByteTyID:  
-  case Type::SByteTyID:
+  case Type::Int8TyID:
     return Out << (isSigned?"signed":"unsigned") << " char " << NameSoFar;
-  case Type::UShortTyID: 
-  case Type::ShortTyID:  
+  case Type::Int16TyID:  
     return Out << (isSigned?"signed":"unsigned") << " short " << NameSoFar;
-  case Type::UIntTyID:   
-  case Type::IntTyID:    
+  case Type::Int32TyID:    
     return Out << (isSigned?"signed":"unsigned") << " int " << NameSoFar;
-  case Type::ULongTyID:  
-  case Type::LongTyID:   
+  case Type::Int64TyID:   
     return Out << (isSigned?"signed":"unsigned") << " long long " << NameSoFar;
   case Type::FloatTyID:  return Out << "float "              << NameSoFar;
   case Type::DoubleTyID: return Out << "double "             << NameSoFar;
@@ -488,7 +484,7 @@ void CWriter::printConstantArray(ConstantArray *CPA) {
   // ubytes or an array of sbytes with positive values.
   //
   const Type *ETy = CPA->getType()->getElementType();
-  bool isString = (ETy == Type::SByteTy || ETy == Type::UByteTy);
+  bool isString = (ETy == Type::Int8Ty || ETy == Type::Int8Ty);
 
   // Make sure the last character is a null char, as automatically added by C
   if (isString && (CPA->getNumOperands() == 0 ||
@@ -810,50 +806,19 @@ void CWriter::printConstant(Constant *CPV) {
   case Type::BoolTyID:
     Out << (cast<ConstantBool>(CPV)->getValue() ? '1' : '0');
     break;
-  case Type::SByteTyID:
-  case Type::UByteTyID:
+  case Type::Int8TyID:
     Out << "((char)" << cast<ConstantInt>(CPV)->getSExtValue() << ")";
     break;
-  case Type::ShortTyID:
-  case Type::UShortTyID:
+  case Type::Int16TyID:
     Out << "((short)" << cast<ConstantInt>(CPV)->getSExtValue() << ")";
     break;
-  case Type::IntTyID:
-  case Type::UIntTyID:
+  case Type::Int32TyID:
     Out << "((int)" << cast<ConstantInt>(CPV)->getSExtValue() << ")";
     break;
-  case Type::LongTyID:
-  case Type::ULongTyID:
+  case Type::Int64TyID:
     Out << "((long long)" << cast<ConstantInt>(CPV)->getSExtValue() << "ll)";
     break;
 
-#if 0
-  case Type::IntTyID:
-    if ((int)cast<ConstantInt>(CPV)->getSExtValue() == (int)0x80000000)
-      Out << "((int)0x80000000U)";   // Handle MININT specially to avoid warning
-    else
-      Out << cast<ConstantInt>(CPV)->getSExtValue();
-    break;
-
-  case Type::LongTyID:
-    if (cast<ConstantInt>(CPV)->isMinValue(true))
-      Out << "(/*INT64_MIN*/(-9223372036854775807LL)-1)";
-    else
-      Out << cast<ConstantInt>(CPV)->getSExtValue() << "ll";
-    break;
-
-  case Type::UByteTyID:
-  case Type::UShortTyID:
-    Out << cast<ConstantInt>(CPV)->getZExtValue();
-    break;
-  case Type::UIntTyID:
-    Out << cast<ConstantInt>(CPV)->getZExtValue() << 'u';
-    break;
-  case Type::ULongTyID:
-    Out << cast<ConstantInt>(CPV)->getZExtValue() << "ull";
-    break;
-#endif
-
   case Type::FloatTyID:
   case Type::DoubleTyID: {
     ConstantFP *FPC = cast<ConstantFP>(CPV);
@@ -1627,10 +1592,8 @@ void CWriter::printFloatingPointConstants(Function &F) {
 void CWriter::printModuleTypes(const SymbolTable &ST) {
   Out << "/* Helper union for bitcasts */\n";
   Out << "typedef union {\n";
-  Out << "  unsigned int UInt;\n";
-  Out << "  signed int SInt;\n";
-  Out << "  unsigned long long ULong;\n";
-  Out << "  signed long long SLong;\n";
+  Out << "  unsigned int Int32;\n";
+  Out << "  unsigned long long Int64;\n";
   Out << "  float Float;\n";
   Out << "  double Double;\n";
   Out << "} llvmBitCastUnion;\n";
@@ -2060,8 +2023,7 @@ void CWriter::visitBinaryOperator(Instruction &I) {
 
   // We must cast the results of binary operations which might be promoted.
   bool needsCast = false;
-  if ((I.getType() == Type::UByteTy) || (I.getType() == Type::SByteTy)
-      || (I.getType() == Type::UShortTy) || (I.getType() == Type::ShortTy)
+  if ((I.getType() == Type::Int8Ty) || (I.getType() == Type::Int16Ty) 
       || (I.getType() == Type::FloatTy)) {
     needsCast = true;
     Out << "((";
@@ -2192,12 +2154,10 @@ void CWriter::visitFCmpInst(FCmpInst &I) {
 static const char * getFloatBitCastField(const Type *Ty) {
   switch (Ty->getTypeID()) {
     default: assert(0 && "Invalid Type");
-    case Type::FloatTyID: return "Float";
-    case Type::UIntTyID:  return "UInt";
-    case Type::IntTyID:   return "SInt";
-    case Type::DoubleTyID:return "Double";
-    case Type::ULongTyID: return "ULong";
-    case Type::LongTyID:  return "SLong";
+    case Type::FloatTyID:  return "Float";
+    case Type::Int32TyID:  return "Int32";
+    case Type::DoubleTyID: return "Double";
+    case Type::Int64TyID:  return "Int64";
   }
 }
 
diff --git a/llvm/lib/Target/IA64/IA64ISelLowering.cpp b/llvm/lib/Target/IA64/IA64ISelLowering.cpp
index 3bc58041192..6fddb373675 100644
--- a/llvm/lib/Target/IA64/IA64ISelLowering.cpp
+++ b/llvm/lib/Target/IA64/IA64ISelLowering.cpp
@@ -290,10 +290,10 @@ IA64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
 
 std::pair<SDOperand, SDOperand>
 IA64TargetLowering::LowerCallTo(SDOperand Chain,
-                                const Type *RetTy, bool isVarArg,
-                                unsigned CallingConv, bool isTailCall,
-                                SDOperand Callee, ArgListTy &Args,
-                                SelectionDAG &DAG) {
+                                const Type *RetTy, bool RetTyIsSigned, 
+                                bool isVarArg, unsigned CallingConv, 
+                                bool isTailCall, SDOperand Callee, 
+                                ArgListTy &Args, SelectionDAG &DAG) {
 
   MachineFunction &MF = DAG.getMachineFunction();
 
@@ -315,7 +315,8 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
     std::max(outRegsUsed, MF.getInfo<IA64FunctionInfo>()->outRegsUsed);
 
   // keep stack frame 16-byte aligned
-  //assert(NumBytes==((NumBytes+15) & ~15) && "stack frame not 16-byte aligned!");
+  // assert(NumBytes==((NumBytes+15) & ~15) && 
+  //        "stack frame not 16-byte aligned!");
   NumBytes = (NumBytes+15) & ~15;
   
   Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy()));
@@ -328,7 +329,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
   
   for (unsigned i = 0, e = Args.size(); i != e; ++i)
     {
-      SDOperand Val = Args[i].first;
+      SDOperand Val = Args[i].Node;
       MVT::ValueType ObjectVT = Val.getValueType();
       SDOperand ValToStore(0, 0), ValToConvert(0, 0);
       unsigned ObjSize=8;
@@ -337,14 +338,15 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
       case MVT::i1:
       case MVT::i8:
       case MVT::i16:
-      case MVT::i32:
+      case MVT::i32: {
         //promote to 64-bits, sign/zero extending based on type
         //of the argument
-        if(Args[i].second->isSigned())
-          Val = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Val);
-        else
-          Val = DAG.getNode(ISD::ZERO_EXTEND, MVT::i64, Val);
+        ISD::NodeType ExtendKind = ISD::ZERO_EXTEND;
+        if (Args[i].isSigned)
+          ExtendKind = ISD::SIGN_EXTEND;
+        Val = DAG.getNode(ExtendKind, MVT::i64, Val);
         // XXX: fall through
+      }
       case MVT::i64:
         //ObjSize = 8;
         if(RegValuesToPass.size() >= 8) {
@@ -422,7 +424,8 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
   unsigned seenConverts = 0;
   for (unsigned i = 0, e = RegValuesToPass.size(); i != e; ++i) {
     if(MVT::isFloatingPoint(RegValuesToPass[i].getValueType())) {
-      Chain = DAG.getCopyToReg(Chain, IntArgRegs[i], Converts[seenConverts++], InFlag);
+      Chain = DAG.getCopyToReg(Chain, IntArgRegs[i], Converts[seenConverts++], 
+                               InFlag);
       InFlag = Chain.getValue(1);
     }
   }
@@ -432,8 +435,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
   for (unsigned i = 0, e = RegValuesToPass.size(); i != e; ++i) {
     Chain = DAG.getCopyToReg(Chain,
       MVT::isInteger(RegValuesToPass[i].getValueType()) ?
-                                          IntArgRegs[i] : FPArgRegs[usedFPArgs++],
-      RegValuesToPass[i], InFlag);
+        IntArgRegs[i] : FPArgRegs[usedFPArgs++], RegValuesToPass[i], InFlag);
     InFlag = Chain.getValue(1);
   }
 
@@ -483,7 +485,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
     case MVT::i1: { // bools are just like other integers (returned in r8)
       // we *could* fall through to the truncate below, but this saves a
       // few redundant predicate ops
-      SDOperand boolInR8 = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, InFlag);
+      SDOperand boolInR8 = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64,InFlag);
       InFlag = boolInR8.getValue(2);
       Chain = boolInR8.getValue(1);
       SDOperand zeroReg = DAG.getCopyFromReg(Chain, IA64::r0, MVT::i64, InFlag);
diff --git a/llvm/lib/Target/IA64/IA64ISelLowering.h b/llvm/lib/Target/IA64/IA64ISelLowering.h
index 704e3589301..9918c4bfe38 100644
--- a/llvm/lib/Target/IA64/IA64ISelLowering.h
+++ b/llvm/lib/Target/IA64/IA64ISelLowering.h
@@ -58,10 +58,9 @@ namespace llvm {
     /// LowerCallTo - This hook lowers an abstract call to a function into an
     /// actual call.
     virtual std::pair<SDOperand, SDOperand>
-      LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg,
-                  unsigned CC,
-                  bool isTailCall, SDOperand Callee, ArgListTy &Args,
-                  SelectionDAG &DAG);
+      LowerCallTo(SDOperand Chain, const Type *RetTy, bool RetTyIsSigned, 
+                  bool isVarArg, unsigned CC, bool isTailCall, 
+                  SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG);
     
     /// LowerOperation - for custom lowering specific ops
     /// (currently, only "ret void")
diff --git a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index e5e9b4463ca..43059ea9ee5 100644
--- a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -117,10 +117,9 @@ namespace {
     virtual std::vector<SDOperand>
       LowerArguments(Function &F, SelectionDAG &DAG);
     virtual std::pair<SDOperand, SDOperand>
-      LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg,
-                  unsigned CC,
-                  bool isTailCall, SDOperand Callee, ArgListTy &Args,
-                  SelectionDAG &DAG);
+      LowerCallTo(SDOperand Chain, const Type *RetTy, bool RetTyIsSigned, 
+                  bool isVarArg, unsigned CC, bool isTailCall, SDOperand Callee,
+                  ArgListTy &Args, SelectionDAG &DAG);
     virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI,
                                                        MachineBasicBlock *MBB);
     
@@ -318,8 +317,7 @@ SparcTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
         MF.addLiveIn(*CurArgReg++, VReg);
         SDOperand Arg = DAG.getCopyFromReg(Root, VReg, MVT::i32);
         if (ObjectVT != MVT::i32) {
-          unsigned AssertOp = I->getType()->isSigned() ? ISD::AssertSext 
-                                                       : ISD::AssertZext;
+          unsigned AssertOp = ISD::AssertSext;
           Arg = DAG.getNode(AssertOp, MVT::i32, Arg, 
                             DAG.getValueType(ObjectVT));
           Arg = DAG.getNode(ISD::TRUNCATE, ObjectVT, Arg);
@@ -332,8 +330,7 @@ SparcTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
         if (ObjectVT == MVT::i32) {
           Load = DAG.getLoad(MVT::i32, Root, FIPtr, NULL, 0);
         } else {
-          ISD::LoadExtType LoadOp =
-            I->getType()->isSigned() ? ISD::SEXTLOAD : ISD::ZEXTLOAD;
+          ISD::LoadExtType LoadOp = ISD::SEXTLOAD;
 
           // Sparc is big endian, so add an offset based on the ObjectVT.
           unsigned Offset = 4-std::max(1U, MVT::getSizeInBits(ObjectVT)/8);
@@ -472,13 +469,13 @@ SparcTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
 
 std::pair<SDOperand, SDOperand>
 SparcTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
-                                 bool isVarArg, unsigned CC,
+                                 bool RetTyIsSigned, bool isVarArg, unsigned CC,
                                  bool isTailCall, SDOperand Callee, 
                                  ArgListTy &Args, SelectionDAG &DAG) {
   // Count the size of the outgoing arguments.
   unsigned ArgsSize = 0;
   for (unsigned i = 0, e = Args.size(); i != e; ++i) {
-    switch (getValueType(Args[i].second)) {
+    switch (getValueType(Args[i].Ty)) {
     default: assert(0 && "Unknown value type!");
     case MVT::i1:
     case MVT::i8:
@@ -508,7 +505,7 @@ SparcTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
   std::vector<SDOperand> RegValuesToPass;
   unsigned ArgOffset = 68;
   for (unsigned i = 0, e = Args.size(); i != e; ++i) {
-    SDOperand Val = Args[i].first;
+    SDOperand Val = Args[i].Node;
     MVT::ValueType ObjectVT = Val.getValueType();
     SDOperand ValToStore(0, 0);
     unsigned ObjSize;
@@ -516,14 +513,15 @@ SparcTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
     default: assert(0 && "Unhandled argument type!");
     case MVT::i1:
     case MVT::i8:
-    case MVT::i16:
+    case MVT::i16: {
       // Promote the integer to 32-bits.  If the input type is signed, use a
       // sign extend, otherwise use a zero extend.
-      if (Args[i].second->isSigned())
-        Val = DAG.getNode(ISD::SIGN_EXTEND, MVT::i32, Val);
-      else
-        Val = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Val);
+      ISD::NodeType ExtendKind = ISD::ZERO_EXTEND;
+      if (Args[i].isSigned)
+        ExtendKind = ISD::SIGN_EXTEND;
+      Val = DAG.getNode(ExtendKind, MVT::i32, Val);
       // FALL THROUGH
+    }
     case MVT::i32:
       ObjSize = 4;
 
@@ -629,15 +627,19 @@ SparcTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
     default: assert(0 && "Unknown value type to return!");
     case MVT::i1:
     case MVT::i8:
-    case MVT::i16:
+    case MVT::i16: {
       RetVal = DAG.getCopyFromReg(Chain, SP::O0, MVT::i32, InFlag);
       Chain = RetVal.getValue(1);
       
       // Add a note to keep track of whether it is sign or zero extended.
-      RetVal = DAG.getNode(RetTy->isSigned() ? ISD::AssertSext :ISD::AssertZext,
-                           MVT::i32, RetVal, DAG.getValueType(RetTyVT));
+      ISD::NodeType AssertKind = ISD::AssertZext;
+      if (RetTyIsSigned)
+        AssertKind = ISD::AssertSext;
+      RetVal = DAG.getNode(AssertKind, MVT::i32, RetVal, 
+                           DAG.getValueType(RetTyVT));
       RetVal = DAG.getNode(ISD::TRUNCATE, RetTyVT, RetVal);
       break;
+    }
     case MVT::i32:
       RetVal = DAG.getCopyFromReg(Chain, SP::O0, MVT::i32, InFlag);
       Chain = RetVal.getValue(1);
diff --git a/llvm/lib/Target/TargetData.cpp b/llvm/lib/Target/TargetData.cpp
index 6dfeefde5f7..db0ea2cb4c6 100644
--- a/llvm/lib/Target/TargetData.cpp
+++ b/llvm/lib/Target/TargetData.cpp
@@ -243,14 +243,10 @@ static inline void getTypeInfo(const Type *Ty, const TargetData *TD,
   switch (Ty->getTypeID()) {
   case Type::BoolTyID:   Size = 1; Alignment = TD->getBoolAlignment(); return;
   case Type::VoidTyID:
-  case Type::UByteTyID:
-  case Type::SByteTyID:  Size = 1; Alignment = TD->getByteAlignment(); return;
-  case Type::UShortTyID:
-  case Type::ShortTyID:  Size = 2; Alignment = TD->getShortAlignment(); return;
-  case Type::UIntTyID:
-  case Type::IntTyID:    Size = 4; Alignment = TD->getIntAlignment(); return;
-  case Type::ULongTyID:
-  case Type::LongTyID:   Size = 8; Alignment = TD->getLongAlignment(); return;
+  case Type::Int8TyID:   Size = 1; Alignment = TD->getByteAlignment(); return;
+  case Type::Int16TyID:  Size = 2; Alignment = TD->getShortAlignment(); return;
+  case Type::Int32TyID:  Size = 4; Alignment = TD->getIntAlignment(); return;
+  case Type::Int64TyID:  Size = 8; Alignment = TD->getLongAlignment(); return;
   case Type::FloatTyID:  Size = 4; Alignment = TD->getFloatAlignment(); return;
   case Type::DoubleTyID: Size = 8; Alignment = TD->getDoubleAlignment(); return;
   case Type::LabelTyID:
@@ -312,9 +308,9 @@ unsigned char TargetData::getTypeAlignmentShift(const Type *Ty) const {
 const Type *TargetData::getIntPtrType() const {
   switch (getPointerSize()) {
   default: assert(0 && "Unknown pointer size!");
-  case 2: return Type::UShortTy;
-  case 4: return Type::UIntTy;
-  case 8: return Type::ULongTy;
+  case 2: return Type::Int16Ty;
+  case 4: return Type::Int32Ty;
+  case 8: return Type::Int64Ty;
   }
 }
 
@@ -329,7 +325,7 @@ uint64_t TargetData::getIndexedOffset(const Type *ptrTy,
     TI = gep_type_begin(ptrTy, Idx.begin(), Idx.end());
   for (unsigned CurIDX = 0; CurIDX != Idx.size(); ++CurIDX, ++TI) {
     if (const StructType *STy = dyn_cast<StructType>(*TI)) {
-      assert(Idx[CurIDX]->getType() == Type::UIntTy && "Illegal struct idx");
+      assert(Idx[CurIDX]->getType() == Type::Int32Ty && "Illegal struct idx");
       unsigned FieldNo = cast<ConstantInt>(Idx[CurIDX])->getZExtValue();
 
       // Get structure layout information...
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index d92c699012b..ac1b708e885 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -4447,14 +4447,21 @@ SDOperand X86TargetLowering::LowerMEMSET(SDOperand Op, SelectionDAG &DAG) {
       (I && I->getValue() < Subtarget->getMinRepStrSizeThreshold())) {
     MVT::ValueType IntPtr = getPointerTy();
     const Type *IntPtrTy = getTargetData()->getIntPtrType();
-    std::vector<std::pair<SDOperand, const Type*> > Args;
-    Args.push_back(std::make_pair(Op.getOperand(1), IntPtrTy));
+    TargetLowering::ArgListTy Args; 
+    TargetLowering::ArgListEntry Entry;
+    Entry.Node = Op.getOperand(1);
+    Entry.Ty = IntPtrTy;
+    Entry.isSigned = false;
+    Args.push_back(Entry);
     // Extend the ubyte argument to be an int value for the call.
-    SDOperand Val = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Op.getOperand(2));
-    Args.push_back(std::make_pair(Val, IntPtrTy));
-    Args.push_back(std::make_pair(Op.getOperand(3), IntPtrTy));
+    Entry.Node = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Op.getOperand(2));
+    Entry.Ty = IntPtrTy;
+    Entry.isSigned = false;
+    Args.push_back(Entry);
+    Entry.Node = Op.getOperand(3);
+    Args.push_back(Entry);
     std::pair<SDOperand,SDOperand> CallResult =
-      LowerCallTo(Chain, Type::VoidTy, false, CallingConv::C, false,
+      LowerCallTo(Chain, Type::VoidTy, false, false, CallingConv::C, false,
                   DAG.getExternalSymbol("memset", IntPtr), Args, DAG);
     return CallResult.second;
   }
@@ -4601,13 +4608,14 @@ SDOperand X86TargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) {
   if ((Align & 3) != 0 ||
       (I && I->getValue() < Subtarget->getMinRepStrSizeThreshold())) {
     MVT::ValueType IntPtr = getPointerTy();
-    const Type *IntPtrTy = getTargetData()->getIntPtrType();
-    std::vector<std::pair<SDOperand, const Type*> > Args;
-    Args.push_back(std::make_pair(Op.getOperand(1), IntPtrTy));
-    Args.push_back(std::make_pair(Op.getOperand(2), IntPtrTy));
-    Args.push_back(std::make_pair(Op.getOperand(3), IntPtrTy));
+    TargetLowering::ArgListTy Args;
+    TargetLowering::ArgListEntry Entry;
+    Entry.Ty = getTargetData()->getIntPtrType(); Entry.isSigned = false;
+    Entry.Node = Op.getOperand(1); Args.push_back(Entry);
+    Entry.Node = Op.getOperand(2); Args.push_back(Entry);
+    Entry.Node = Op.getOperand(3); Args.push_back(Entry);
     std::pair<SDOperand,SDOperand> CallResult =
-      LowerCallTo(Chain, Type::VoidTy, false, CallingConv::C, false,
+      LowerCallTo(Chain, Type::VoidTy, false, false, CallingConv::C, false,
                   DAG.getExternalSymbol("memcpy", IntPtr), Args, DAG);
     return CallResult.second;
   }
diff --git a/llvm/lib/Target/X86/X86TargetAsmInfo.cpp b/llvm/lib/Target/X86/X86TargetAsmInfo.cpp
index 71640380348..e25e2690af4 100644
--- a/llvm/lib/Target/X86/X86TargetAsmInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetAsmInfo.cpp
@@ -172,13 +172,13 @@ bool X86TargetAsmInfo::LowerToBSwap(CallInst *CI) const {
       !CI->getType()->isInteger())
     return false;
   
-  const Type *Ty = CI->getType()->getUnsignedVersion();
+  const Type *Ty = CI->getType();
   const char *IntName;
   switch (Ty->getTypeID()) {
   default: return false;
-  case Type::UShortTyID: IntName = "llvm.bswap.i16"; break;
-  case Type::UIntTyID:   IntName = "llvm.bswap.i32"; break;
-  case Type::ULongTyID:  IntName = "llvm.bswap.i64"; break;
+  case Type::Int16TyID: IntName = "llvm.bswap.i16"; break;
+  case Type::Int32TyID:   IntName = "llvm.bswap.i32"; break;
+  case Type::Int64TyID:  IntName = "llvm.bswap.i64"; break;
   }
 
   // Okay, we can do this xform, do so now.
@@ -226,7 +226,7 @@ bool X86TargetAsmInfo::ExpandInlineAsm(CallInst *CI) const {
     }
     break;
   case 3:
-    if (CI->getType() == Type::ULongTy && Constraints.size() >= 2 &&
+    if (CI->getType() == Type::Int64Ty && Constraints.size() >= 2 &&
         Constraints[0].Codes.size() == 1 && Constraints[0].Codes[0] == "A" &&
         Constraints[1].Codes.size() == 1 && Constraints[1].Codes[0] == "0") {
       // bswap %eax / bswap %edx / xchgl %eax, %edx  -> llvm.bswap.i64