diff options
Diffstat (limited to 'llvm/lib/Target/IA64/IA64ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/IA64/IA64ISelLowering.cpp | 32 |
1 files changed, 17 insertions, 15 deletions
diff --git a/llvm/lib/Target/IA64/IA64ISelLowering.cpp b/llvm/lib/Target/IA64/IA64ISelLowering.cpp index 3bc58041192..6fddb373675 100644 --- a/llvm/lib/Target/IA64/IA64ISelLowering.cpp +++ b/llvm/lib/Target/IA64/IA64ISelLowering.cpp @@ -290,10 +290,10 @@ IA64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { std::pair<SDOperand, SDOperand> IA64TargetLowering::LowerCallTo(SDOperand Chain, - const Type *RetTy, bool isVarArg, - unsigned CallingConv, bool isTailCall, - SDOperand Callee, ArgListTy &Args, - SelectionDAG &DAG) { + const Type *RetTy, bool RetTyIsSigned, + bool isVarArg, unsigned CallingConv, + bool isTailCall, SDOperand Callee, + ArgListTy &Args, SelectionDAG &DAG) { MachineFunction &MF = DAG.getMachineFunction(); @@ -315,7 +315,8 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, std::max(outRegsUsed, MF.getInfo<IA64FunctionInfo>()->outRegsUsed); // keep stack frame 16-byte aligned - //assert(NumBytes==((NumBytes+15) & ~15) && "stack frame not 16-byte aligned!"); + // assert(NumBytes==((NumBytes+15) & ~15) && + // "stack frame not 16-byte aligned!"); NumBytes = (NumBytes+15) & ~15; Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy())); @@ -328,7 +329,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, for (unsigned i = 0, e = Args.size(); i != e; ++i) { - SDOperand Val = Args[i].first; + SDOperand Val = Args[i].Node; MVT::ValueType ObjectVT = Val.getValueType(); SDOperand ValToStore(0, 0), ValToConvert(0, 0); unsigned ObjSize=8; @@ -337,14 +338,15 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, case MVT::i1: case MVT::i8: case MVT::i16: - case MVT::i32: + case MVT::i32: { //promote to 64-bits, sign/zero extending based on type //of the argument - if(Args[i].second->isSigned()) - Val = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Val); - else - Val = DAG.getNode(ISD::ZERO_EXTEND, MVT::i64, Val); + ISD::NodeType ExtendKind = ISD::ZERO_EXTEND; + if (Args[i].isSigned) + ExtendKind = ISD::SIGN_EXTEND; + Val = DAG.getNode(ExtendKind, MVT::i64, Val); // XXX: fall through + } case MVT::i64: //ObjSize = 8; if(RegValuesToPass.size() >= 8) { @@ -422,7 +424,8 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, unsigned seenConverts = 0; for (unsigned i = 0, e = RegValuesToPass.size(); i != e; ++i) { if(MVT::isFloatingPoint(RegValuesToPass[i].getValueType())) { - Chain = DAG.getCopyToReg(Chain, IntArgRegs[i], Converts[seenConverts++], InFlag); + Chain = DAG.getCopyToReg(Chain, IntArgRegs[i], Converts[seenConverts++], + InFlag); InFlag = Chain.getValue(1); } } @@ -432,8 +435,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, for (unsigned i = 0, e = RegValuesToPass.size(); i != e; ++i) { Chain = DAG.getCopyToReg(Chain, MVT::isInteger(RegValuesToPass[i].getValueType()) ? - IntArgRegs[i] : FPArgRegs[usedFPArgs++], - RegValuesToPass[i], InFlag); + IntArgRegs[i] : FPArgRegs[usedFPArgs++], RegValuesToPass[i], InFlag); InFlag = Chain.getValue(1); } @@ -483,7 +485,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, case MVT::i1: { // bools are just like other integers (returned in r8) // we *could* fall through to the truncate below, but this saves a // few redundant predicate ops - SDOperand boolInR8 = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, InFlag); + SDOperand boolInR8 = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64,InFlag); InFlag = boolInR8.getValue(2); Chain = boolInR8.getValue(1); SDOperand zeroReg = DAG.getCopyFromReg(Chain, IA64::r0, MVT::i64, InFlag); |
