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authorDylan McKay <dylanmckay34@gmail.com>2016-10-08 01:01:49 +0000
committerDylan McKay <dylanmckay34@gmail.com>2016-10-08 01:01:49 +0000
commitc1ff65cf62635fedb69fd360d9e292c03004c490 (patch)
tree6823fa171a2c08e9292d315dd613de6816b12085 /llvm/lib/Target
parentb10fc3709609ecec4f615aa0f734266fc78721d1 (diff)
downloadbcm5719-llvm-c1ff65cf62635fedb69fd360d9e292c03004c490.tar.gz
bcm5719-llvm-c1ff65cf62635fedb69fd360d9e292c03004c490.zip
[AVR] Expand MULHS for all types
Once MULHS was expanded, this exposed an issue where the condition register was thought to be 16-bit. This caused an attempt to copy a 16-bit register to an 8-bit register. Authored by Jake Goulding llvm-svn: 283634
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/AVR/AVRISelLowering.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/AVR/AVRISelLowering.h b/llvm/lib/Target/AVR/AVRISelLowering.h
index 2c8c9c88b6d..69aaaf2db21 100644
--- a/llvm/lib/Target/AVR/AVRISelLowering.h
+++ b/llvm/lib/Target/AVR/AVRISelLowering.h
@@ -92,6 +92,9 @@ public:
bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
+ EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
+ EVT VT) const override;
+
MachineBasicBlock *
EmitInstrWithCustomInserter(MachineInstr &MI,
MachineBasicBlock *MBB) const override;
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