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| author | Alexander Timofeev <Alexander.Timofeev@amd.com> | 2018-09-07 09:05:34 +0000 |
|---|---|---|
| committer | Alexander Timofeev <Alexander.Timofeev@amd.com> | 2018-09-07 09:05:34 +0000 |
| commit | a805c96c65f55e44e713101d4a1dbeb3e7067219 (patch) | |
| tree | 58e6506d35017f6ba87274069b7e76ac3a746496 /llvm/lib/Target | |
| parent | 99124cc082d8b5d5a07bb80a4a37a0a88d6fade4 (diff) | |
| download | bcm5719-llvm-a805c96c65f55e44e713101d4a1dbeb3e7067219.tar.gz bcm5719-llvm-a805c96c65f55e44e713101d4a1dbeb3e7067219.zip | |
[AMDGPU] Preliminary patch for divergence driven instruction selection. Fold immediate SMRD offset.
Differential revision: https://reviews.llvm.org/D51610
Reviewer: rampitec
llvm-svn: 341636
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index 81f631ced87..7bf94703361 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -4063,9 +4063,17 @@ void SIInstrInfo::moveToVALU(MachineInstr &TopInst) const { getNamedOperand(*Add, SrcNames[i]); if (Src->isReg()) { - auto Mov = MRI.getUniqueVRegDef(Src->getReg()); - if (Mov && Mov->getOpcode() == AMDGPU::S_MOV_B32) - Src = &Mov->getOperand(1); + MachineInstr *Def = MRI.getUniqueVRegDef(Src->getReg()); + if (Def) { + if (Def->isMoveImmediate()) + Src = &Def->getOperand(1); + else if (Def->isCopy()) { + auto Mov = MRI.getUniqueVRegDef(Def->getOperand(1).getReg()); + if (Mov && Mov->isMoveImmediate()) { + Src = &Mov->getOperand(1); + } + } + } } if (Src) { |
