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| author | Alexander Timofeev <Alexander.Timofeev@amd.com> | 2018-09-07 09:05:34 +0000 |
|---|---|---|
| committer | Alexander Timofeev <Alexander.Timofeev@amd.com> | 2018-09-07 09:05:34 +0000 |
| commit | a805c96c65f55e44e713101d4a1dbeb3e7067219 (patch) | |
| tree | 58e6506d35017f6ba87274069b7e76ac3a746496 | |
| parent | 99124cc082d8b5d5a07bb80a4a37a0a88d6fade4 (diff) | |
| download | bcm5719-llvm-a805c96c65f55e44e713101d4a1dbeb3e7067219.tar.gz bcm5719-llvm-a805c96c65f55e44e713101d4a1dbeb3e7067219.zip | |
[AMDGPU] Preliminary patch for divergence driven instruction selection. Fold immediate SMRD offset.
Differential revision: https://reviews.llvm.org/D51610
Reviewer: rampitec
llvm-svn: 341636
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 14 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/smrd-fold-offset.mir | 23 |
2 files changed, 34 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index 81f631ced87..7bf94703361 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -4063,9 +4063,17 @@ void SIInstrInfo::moveToVALU(MachineInstr &TopInst) const { getNamedOperand(*Add, SrcNames[i]); if (Src->isReg()) { - auto Mov = MRI.getUniqueVRegDef(Src->getReg()); - if (Mov && Mov->getOpcode() == AMDGPU::S_MOV_B32) - Src = &Mov->getOperand(1); + MachineInstr *Def = MRI.getUniqueVRegDef(Src->getReg()); + if (Def) { + if (Def->isMoveImmediate()) + Src = &Def->getOperand(1); + else if (Def->isCopy()) { + auto Mov = MRI.getUniqueVRegDef(Def->getOperand(1).getReg()); + if (Mov && Mov->isMoveImmediate()) { + Src = &Mov->getOperand(1); + } + } + } } if (Src) { diff --git a/llvm/test/CodeGen/AMDGPU/smrd-fold-offset.mir b/llvm/test/CodeGen/AMDGPU/smrd-fold-offset.mir new file mode 100644 index 00000000000..db8cdd7a5f2 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/smrd-fold-offset.mir @@ -0,0 +1,23 @@ +# RUN: llc -march=amdgcn -run-pass si-fix-sgpr-copies -o - %s | FileCheck -check-prefix=GCN %s + +# GCN: BUFFER_LOAD_DWORD_OFFEN %{{[0-9]+}}, killed %{{[0-9]+}}, 0, 4095 +--- +name: smrd_vgpr_offset_imm +body: | + bb.0: + liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $vgpr0 + + %4:vgpr_32 = COPY $vgpr0 + %3:sgpr_32 = COPY $sgpr3 + %2:sgpr_32 = COPY $sgpr2 + %1:sgpr_32 = COPY $sgpr1 + %0:sgpr_32 = COPY $sgpr0 + %5:sgpr_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2, %3, %subreg.sub3 + %6:sreg_32_xm0 = S_MOV_B32 4095 + %8:vgpr_32 = COPY %6 + %7:vgpr_32 = V_ADD_I32_e32 %4, killed %8, implicit-def dead $vcc, implicit $exec + %10:sreg_32 = COPY %7 + %9:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR killed %5, killed %10, 0 + $vgpr0 = COPY %9 + SI_RETURN_TO_EPILOG $vgpr0 +... |
