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authorSanjay Patel <spatel@rotateright.com>2015-09-12 15:27:31 +0000
committerSanjay Patel <spatel@rotateright.com>2015-09-12 15:27:31 +0000
commit99f7370a79a7f58fe12e842b5a9e3d4031af9bd7 (patch)
tree077fc5898d5a3083e49df30cf833b294bfaf108e /llvm/lib/Target
parent08755c7dbc5a038b79521bcf7ac52cbb26ccfd4c (diff)
downloadbcm5719-llvm-99f7370a79a7f58fe12e842b5a9e3d4031af9bd7.tar.gz
bcm5719-llvm-99f7370a79a7f58fe12e842b5a9e3d4031af9bd7.zip
revert r247506; need to verify changes in existing tests
llvm-svn: 247507
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.cpp6
1 files changed, 0 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 446d4bce155..8b883162999 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -6408,12 +6408,6 @@ static bool isAssociativeAndCommutative(const MachineInstr &Inst) {
case X86::IMUL16rr:
case X86::IMUL32rr:
case X86::IMUL64rr:
- case X86::PANDrr:
- case X86::PORrr:
- case X86::PXORrr:
- case X86::VPANDrr:
- case X86::VPORrr:
- case X86::VPXORrr:
// Normal min/max instructions are not commutative because of NaN and signed
// zero semantics, but these are. Thus, there's no need to check for global
// relaxed math; the instructions themselves have the properties we need.
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