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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-02-02 19:32:42 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-02-02 19:32:42 +0000 |
| commit | 8b175672cbbb19d328038be74fd917e405b46168 (patch) | |
| tree | a036c95a16873ee012fcc32fbe7d7a86c0c468a7 /llvm/lib/Target | |
| parent | fb8cdbae0cb246ceca9dfd4dbc8c4a60a2ffe759 (diff) | |
| download | bcm5719-llvm-8b175672cbbb19d328038be74fd917e405b46168.tar.gz bcm5719-llvm-8b175672cbbb19d328038be74fd917e405b46168.zip | |
AMDGPU: Skip promote alloca with no optimizations
llvm-svn: 259551
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp index 367a9388286..f17317deacb 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp @@ -98,7 +98,7 @@ bool AMDGPUPromoteAlloca::doInitialization(Module &M) { } bool AMDGPUPromoteAlloca::runOnFunction(Function &F) { - if (!TM) + if (!TM || F.hasFnAttribute(Attribute::OptimizeNone)) return false; FunctionType *FTy = F.getFunctionType(); diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index 82a4cfff37d..ef3a5afb32c 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -229,7 +229,7 @@ void AMDGPUPassConfig::addIRPasses() { void AMDGPUPassConfig::addCodeGenPrepare() { const AMDGPUTargetMachine &TM = getAMDGPUTargetMachine(); const AMDGPUSubtarget &ST = *TM.getSubtargetImpl(); - if (ST.isPromoteAllocaEnabled()) { + if (TM.getOptLevel() > CodeGenOpt::None && ST.isPromoteAllocaEnabled()) { addPass(createAMDGPUPromoteAlloca(&TM)); addPass(createSROAPass()); } |
