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| author | Craig Topper <craig.topper@intel.com> | 2017-09-28 23:35:36 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-09-28 23:35:36 +0000 |
| commit | 6255c7b6755acc5d4f38dea359fcbeba13fa776f (patch) | |
| tree | e6536fca143a6cd284082de5081512e02f242d9e /llvm/lib/Target | |
| parent | 43e6f7bee52feba6d7af9f414bc5e8f256ebddf2 (diff) | |
| download | bcm5719-llvm-6255c7b6755acc5d4f38dea359fcbeba13fa776f.tar.gz bcm5719-llvm-6255c7b6755acc5d4f38dea359fcbeba13fa776f.zip | |
[X86] Don't select (cmp (and, imm), 0) to testw
Summary:
X86ISelDAGToDAG tries to analyze ANDs compared with 0 to optimize to narrower immediates using subregisters.
I don't think we should be optimizing to 16-bit test instructions. It goes against our normal behavior of promoting i16 operations to i32. It only saves one byte due to the need to add a 0x66 prefix. I think it would also be subject to a length changing prefix penalty in the decoders on Intel CPUs.
Reviewers: RKSimon, zvi, spatel
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38273
llvm-svn: 314474
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp index 84b1f9624ad..eb0107a5fa4 100644 --- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -3025,7 +3025,10 @@ void X86DAGToDAGISel::Select(SDNode *Node) { } // For example, "testl %eax, $32776" to "testw %ax, $32776". - if (isUInt<16>(Mask) && N0.getValueType() != MVT::i16 && + // NOTE: We only want to form TESTW instructions if optimizing for + // min size. Otherwise we only save one byte and possibly get a length + // changing prefix penalty in the decoders. + if (OptForMinSize && isUInt<16>(Mask) && N0.getValueType() != MVT::i16 && (!(Mask & 0x8000) || hasNoSignedComparisonUses(Node))) { SDValue Imm = CurDAG->getTargetConstant(Mask, dl, MVT::i16); SDValue Reg = N0.getOperand(0); |

